In_xGa_{1-x}Sb MOSFET: Performance Analysis by Self Consistent CV Characterization and Direct Tunneling Gate Leakage Current

In this paper, Capacitance-Voltage (C-V) characteristics and direct tunneling (DT) gate leakage current of antimonide based surface channel MOSFET were investigated. Self-consistent method was applied by solving coupled Schr\"odinger-Poisson equation taking wave function penetration and strain effects into account. Experimental I-V and gate leakage characteristic for p-channel InxGa1-xSb MOSFETs are available in recent literature. However, a self- consistent simulation of C-V characterization and direct tunneling gate leakage current is yet to be done for both n- channel and p-channel InxGa1-xSb surface channel MOSFETs. We studied the variation of C-V characteristics and gate leakage current with some important process parameters like oxide thickness, channel composition, channel thickness and temperature for n-channel MOSFET in this work. Device performance should improve as compressive strain increases in channel. Our simulation results validate this phenomenon as ballistic current increases and gate leakage current decreases with the increase in compressive strain. We also compared the device performance by replacing InxGa1-xSb with InxGa1-xAs in channel of the structure. Simulation results show that performance is much better with this replacement.Comment: 7 pages, EIT 2012 IUPUI conferenc

Self-Consistent C-V Characterization of Depletion Mode Buried Channel InGaAs/InAs Quantum Well FET Incorporating Strain Effects

We investigated Capacitance-Voltage (C-V) characteristics of the Depletion Mode Buried Channel InGaAs/InAs Quantum Well FET by using Self-Consistent method incorporating Quantum Mechanical (QM) effects. Though the experimental results of C-V for enhancement type device is available in recent literature, a complete characterization of electrostatic property of depletion type Buried Channel Quantum Well FET (QWFET) structure is yet to be done. C-V characteristics of the device is studied with the variation of three important process parameters: Indium (In) composition, gate dielectric and oxide thickness. We observed that inversion capacitance and ballistic current tend to increase with the increase in Indium (In) content in InGaAs barrier layer.Comment: 5 pages, ICEDSA conference 201

A Physically Based Analytical Modeling of Threshold Voltage Control for Fully-Depleted SOI Double Gate NMOS-PMOS Flexible-FET

In this work, we propose an explicit analytical equation to show the variation of top gate threshold voltage with respect to the JFET bottom gate voltage for a Flexible Threshold Voltage Field Effect Transistor (Flexible-FET) by solving 2-D Poisson's equation with appropriate boundary conditions, incorporating Young's parabolic approximation. The proposed model illustrates excellent match with the experimental results for both n-channel and p-channel 180nm Flexible-FETs. Threshold voltage variation with several important device parameters (oxide and silicon channel thickness, doping concentration) is observed which yields qualitative matching with results obtained from SILVACO simulations.Comment: 4 pages, EIT 2012-IUPUI conferenc

Self Consistent Simulation of C-V Characterization and Ballistic Performance of Double Gate SOI Flexible-FET Incorporating QM Effects

Capacitance-Voltage (C-V) & Ballistic Current- Voltage (I-V) characteristics of Double Gate (DG) Silicon-on- Insulator (SOI) Flexible FETs having sub 35nm dimensions are obtained by self-consistent method using coupled Schrodinger- Poisson solver taking into account the quantum mechanical effects. Although, ATLAS simulations to determine current and other short channel effects in this device have been demonstrated in recent literature, C-V & Ballistic I-V characterizations by using self-consistent method are yet to be reported. C-V characteristic of this device is investigated here with the variation of bottom gate voltage. The depletion to accumulation transition point (i.e. Threshold voltage) of the C-V curve should shift in the positive direction when the bottom gate is negatively biased and our simulation results validate this phenomenon. Ballistic performance of this device has also been studied with the variation of top gate voltage.Comment: 4 pages, ICEDSA 2012 conferenc

Advance technique rectangular microstrip patch antenna with EBGS

EEE/201

Solid Electrolytic Substrates for High Performance Transistors and Circuits

Ionic liquids/gels have been used to realize field-effect-transistors (FETs) with two dimensional (2D) transition metal dichalcogenides (TMDs) [1]. Although near ideal gating has been reported with this biasing scheme, it suffers from several issues such as, liquid nature of the electrolyte, its humidity dependency and freezing at low temperatures [2]. Recently, air-stable solid electrolytes have been developed, thanks to the advancement in battery technology [3]. Although insulator-to-metal transition has been reported, the realization of 2D TMD FETs on solid electrolytic substrate has not been reported so far to the best of our knowledge [4]. In this work, we demonstrate a lithium ion (Liion) solid electrolytic substrate based TMD transistor and a CMOS amplifier, with near ideal gating efficiency reaching 60 mV/dec subthreshold swing, and amplifier gain ~34, the highest among comparable inverte

Lithium-ion electrolytic substrates for sub-1V high-performance transition metal dichalcogenide transistors and amplifiers

Electrostatic gating of two-dimensional (2D) materials with ionic liquids (ILs), leading to the accumulation of high surface charge carrier densities, has been often exploited in 2D devices. However, the intrinsic liquid nature of ILs, their sensitivity to humidity, and the stress induced in frozen liquids inhibit ILs from constituting an ideal platform for electrostatic gating. Here we report a lithium-ion solid electrolyte substrate, demonstrating its application in high-performance back-gated n-type MoS2 and p-type WSe2 transistors with sub-threshold values approaching the ideal limit of 60 mV/dec and complementary inverter amplifier gain of 34, the highest among comparable amplifiers. Remarkably, these outstanding values were obtained under 1 V power supply. Microscopic studies of the transistor channel using microwave impedance microscopy reveal a homogeneous channel formation, indicative of a smooth interface between the TMD and underlying electrolytic substrate. These results establish lithium-ion substrates as a promising alternative to ILs for advanced thin-film devices

Direct growth of MoS 2 on electrolytic substrate and realization of high-mobility transistors

Although electrostatic gating with liquid electrolytes has been thoroughly investigated to enhance electrical transport in two-dimensional (2D) materials, solid electrolyte alternatives are now actively being researched to overcome the limitations of liquid dielectrics. Here, we report direct growth of few-layer (3-4 L) molybdenum disulfide (MoS2), a prototypical 2D transition metal dichalcogenide (TMD), on lithium-ion solid electrolyte substrate by chemical vapor deposition (CVD), and demonstrate a transfer-free device fabrication method. The growth resulted in 5-10 µm sized triangular MoS2 single-crystals as confirmed by Raman spectroscopy, X-ray photoelectron spectroscopy, and scanning electron microscopy. Field-effect transistors (FETs) fabricated on the as-grown few-layer crystals show near-ideal gating performance with room temperature subthreshold swings around 65 mV/dec while maintaining an ON/OFF ratio around 10 5. Field-effect mobility in the range of 42-49 cm2V-1s-1 and current densities as high as 120 µA/µm with 0.5 µm channel length has been achieved, back-gated by the solid electrolyte. This is the highest reported mobility among comparable FETs on as-grown single/few-layer CVD MoS2. This growth and transfer-free device fabrication method on solid electrolyte substrates can be applied to other 2D TMDs for studying advanced thin-film transistors, interesting physics, and is amenable to diverse surface science experiments, otherwise difficult to realize with liquid electrolytes.D.A. acknowledges the PECASE award from the Army Research Office (ARO) grant #W911NF-16-1-0277, and the National Science Foundation (NSF) MRSEC Center (DMR- 1720595). S.K.B. acknowledges support from ARO grant #W911NF-17-1-0312 (MURI), and the NSF NASCENT ERC. The work was partly done at the Texas Nanofabrication Facility supported by NSF grant #NNCI-1542159.Center for Dynamics and Control of Material

ANSYS/Fluent Simulation Model Development for Forced Helium Dehydration Process

This thesis describes the development and design of simulation model in “ANSYS FLUENT” for Spent Nuclear Fuel dehydration process by “Forced Helium Dehydration” [13] method [28]. The simulation model was developed using the computational fluid dynamics software “FLUENT” [28]. After defueling a nuclear reactor, the fuel rods are kept underwater. Later they are put into a transfer cask. The fuel rods have to be stored in dry condition for long term storage. “Forced helium dehydration” [13] process uses dry helium gas flow to remove water content from the transfer cask. The mass transfer occurs due to diffusion-advection and evaporation-boiling. There are several evaporation and boiling methods available built in “FLUENT” [28]. So, an optimized method was chosen which was used for simulation of mass transfer in the “Forced Helium Dehydration” [13] process. The method was verified in a two dimensional model, then applied to a three dimensional model. The spent nuclear fuel rods can be arranged in different arrays inside the canister. For our simulation, we used a 7 x 7 array of spent nuclear fuel rods