Sparse Graph Codes for Quantum Error-Correction

We present sparse graph codes appropriate for use in quantum error-correction. Quantum error-correcting codes based on sparse graphs are of interest for three reasons. First, the best codes currently known for classical channels are based on sparse graphs. Second, sparse graph codes keep the number of quantum interactions associated with the quantum error correction process small: a constant number per quantum bit, independent of the blocklength. Third, sparse graph codes often offer great flexibility with respect to blocklength and rate. We believe some of the codes we present are unsurpassed by previously published quantum error-correcting codes.Comment: Version 7.3e: 42 pages. Extended version, Feb 2004. A shortened version was resubmitted to IEEE Transactions on Information Theory Jan 20, 200

An Analysis of the Differences in Exercise, Wearable Exercise Technology Device Use and Increased Exercise Behaviors in University Women

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Gating of high-mobility InAs metamorphic heterostructures

We investigate the performance of gate-defined devices fabricated on high mobility InAs metamorphic heterostructures. We find that heterostructures capped with In$_{0.75}$Ga$_{0.25}$As often show signs of parallel conduction due to proximity of their surface Fermi level to the conduction band minimum. Here, we introduce a technique that can be used to estimate the density of this surface charge that involves cool-downs from room temperature under gate bias. We have been able to remove the parallel conduction under high positive bias, but achieving full depletion has proven difficult. We find that by using In$_{0.75}$Al$_{0.25}$As as the barrier without an In$_{0.75}$Ga$_{0.25}$As capping, a drastic reduction in parallel conduction can be achieved. Our studies show that this does not change the transport properties of the quantum well significantly. We achieved full depletion in InAlAs capped heterostructures with non-hysteretic gating response suitable for fabrication of gate-defined mesoscopic devices

Autoplan: A self-processing network model for an extended blocks world planning environment

Self-processing network models (neural/connectionist models, marker passing/message passing networks, etc.) are currently undergoing intense investigation for a variety of information processing applications. These models are potentially very powerful in that they support a large amount of explicit parallel processing, and they cleanly integrate high level and low level information processing. However they are currently limited by a lack of understanding of how to apply them effectively in many application areas. The formulation of self-processing network methods for dynamic, reactive planning is studied. The long-term goal is to formulate robust, computationally effective information processing methods for the distributed control of semiautonomous exploration systems, e.g., the Mars Rover. The current research effort is focusing on hierarchical plan generation, execution and revision through local operations in an extended blocks world environment. This scenario involves many challenging features that would be encountered in a real planning and control environment: multiple simultaneous goals, parallel as well as sequential action execution, action sequencing determined not only by goals and their interactions but also by limited resources (e.g., three tasks, two acting agents), need to interpret unanticipated events and react appropriately through replanning, etc