Plateau–Rayleigh Crystal Growth of Nanowire Heterostructures: Strain-Modified Surface Chemistry and Morphological Control in One, Two, and Three Dimensions

One-dimensional (1D) structures offer unique opportunities for materials synthesis since crystal phases and morphologies that are difficult or impossible to achieve in macroscopic crystals can be synthesized as 1D nanowires (NWs). Recently, we demonstrated one such phenomenon unique to growth on a 1D substrate, termed Plateau–Rayleigh (P-R) crystal growth, where periodic shells develop along a NW core to form diameter-modulated NW homostructures with tunable morphologies. Here we report a novel extension of the P-R crystal growth concept with the synthesis of heterostructures in which Ge (Si) is deposited on Si (Ge) 1D cores to generate complex NW morphologies in 1, 2, or 3D. Depositing Ge on 50 nm Si cores with a constant GeH₄ pressure yields a single set of periodic shells, while sequential variation of GeH₄ pressure can yield multimodulated 1D NWs with two distinct sets of shell periodicities. P-R crystal growth on 30 nm cores also produces 2D loop structures, where Ge (Si) shells lie primarily on the outside (inside) of a highly curved Si (Ge) core. Systematic investigation of shell morphology as a function of growth time indicates that Ge shells grow in length along positive curvature Si cores faster than along straight Si cores by an order of magnitude. Short Ge deposition times reveal that shells develop on opposite sides of 50 and 100 nm Si cores to form straight 1D morphologies but that shells develop on the same side of 20 nm cores to produce 2D loop and 3D spring structures. These results suggest that strain mediates the formation of 2 and 3D morphologies by altering the NW’s surface chemistry and that surface diffusion of heteroatoms on flexible freestanding 1D substrates can facilitate this strain-mediated mechanism

A Facile Synthesis of MPd (M = Co, Cu) Nanoparticles and Their Catalysis for Formic Acid Oxidation

U.S. Department of Energy, Office of Energy Efficiency and Renewable Energy; "The Scientific and Technological Research Council of Turkey" (TUBITAK) [2214]; ORNL; Office of Basic Energy Sciences, U.S. Department of EnergyMonodisperse CoPd nanoparticles (NPs) were synthesized and studied for catalytic formic acid (HCOOH) oxidation (FAO). The NPs were prepared by coreduction of Co(acac)(2) (acac = acetylacetonate) and PdBr2 at 260 degrees C in oleylamine and trioctylphosphine, and their sizes (5-12 nm) and compositions (Co10Pd90 to Co60Pd40) were controlled by heating ramp rate, metal salt concentration, or metal molar ratios. The 8 nm CoPd NPs were activated for HCOOH oxidation by a simple ethanol wash. In 0.1 M HClO4 and 2 M HCOOH solution, their catalytic activities followed the trend of Co50Pd50 > Co60Pd40 > Co10Pd90 > Pd. The Co50Pd50 NPs had an oxidation peak at 0.4 V with a peak current density of 774 A/g(Pd). As a comparison, commercial Pd catalysts showed an oxidation peak at 0.75 V with peak current density of only 254 A/g(Pd). The synthesis procedure could also be extended to prepare CuPd NPs when Co(acac)(2) was replaced by Cu(ac)(2) (ac = acetate) in an otherwise identical condition. The CuPd NPs were less active catalysts than CoPd or even Pd for FAO in HClO4 solution. The synthesis provides a general approach to Pd-based bimetallic NPs and will enable further investigation of Pd-based alloy NPs for electro-oxidation and other catalytic reactions

Encoding Active Device Elements at Nanowire Tips

Semiconductor nanowires and other one-dimensional materials are attractive for highly sensitive and spatially confined electrical and optical signal detection in biological and physical systems, although it has been difficult to localize active electronic or optoelectronic device function at one end of such one-dimensional structures. Here we report a new nanowire structure in which the material and dopant are modulated specifically at only one end of nanowires to encode an active two-terminal device element. We present a general bottom-up synthetic scheme for these tip-modulated nanowires and illustrate this with the synthesis of nanoscale p–n junctions. Electron microscopy imaging verifies the designed p-Si nanowire core with SiO₂ insulating inner shell and n-Si outer shell with clean p-Si/n-Si tip junction. Electrical transport measurements with independent contacts to the p-Si core and n-Si shell exhibited a current rectification behavior through the tip and no detectable current through the SiO₂ shell. Electrical measurements also exhibited an n-type response in conductance versus water-gate voltage with pulsed gate experiments yielding a temporal resolution of at least 0.1 ms and ∼90% device sensitivity localized to within 0.5 μm from the nanowire p–n tip. In addition, photocurrent experiments showed an open-circuit voltage of 0.75 V at illumination power of ∼28.1 μW, exhibited linear dependence of photocurrent with respect to incident illumination power with an estimated responsivity up to ∼0.22 A/W, and revealed localized photocurrent generation at the nanowire tip. The tip-modulated concept was further extended to a top-down/bottom-up hybrid approach that enabled large-scale production of vertical tip-modulated nanowires with a final synthetic yield of >75% with >4300 nanowires. Vertical tip-modulated nanowires were fabricated into >50 individually addressable nanowire device arrays showing diode-like current–voltage characteristics. These tip-modulated nanowire devices provide substantial opportunity in areas ranging from biological and chemical sensing to optoelectronic signal and nanoscale photodetection

Shape-Controlled Deterministic Assembly of Nanowires

Large-scale, deterministic assembly of nanowires and nanotubes with rationally controlled geometries could expand the potential applications of one-dimensional nanomaterials in bottom-up integrated nanodevice arrays and circuits. Control of the positions of straight nanowires and nanotubes has been achieved using several assembly methods, although simultaneous control of position and geometry has not been realized. Here, we demonstrate a new concept combining simultaneous assembly and guided shaping to achieve large-scale, high-precision shape controlled deterministic assembly of nanowires. We lithographically pattern U-shaped trenches and then shear transfer nanowires to the patterned substrate wafers, where the trenches serve to define the positions and shapes of transferred nanowires. Studies using semicircular trenches defined by electron-beam lithography yielded U-shaped nanowires with radii of curvature defined by inner surface of the trenches. Wafer-scale deterministic assembly produced U-shaped nanowires for >430 000 sites with a yield of ∼90%. In addition, mechanistic studies and simulations demonstrate that shaping results in primarily elastic deformation of the nanowires and show clearly the diameter-dependent limits achievable for accessible forces. Last, this approach was used to assemble U-shaped three-dimensional nanowire field-effect transistor bioprobe arrays containing 200 individually addressable nanodevices. By combining the strengths of wafer-scale top-down fabrication with diverse and tunable properties of one-dimensional building blocks in novel structural configurations, shape-controlled deterministic nanowire assembly is expected to enable new applications in many areas including nanobioelectronics and nanophotonics

Facet-Selective Epitaxy of Compound Semiconductors on Faceted Silicon Nanowires

Integration of compound semiconductors with silicon (Si) has been a long-standing goal for the semiconductor industry, as direct band gap compound semiconductors offer, for example, attractive photonic properties not possible with Si devices. However, mismatches in lattice constant, thermal expansion coefficient, and polarity between Si and compound semiconductors render growth of epitaxial heterostructures challenging. Nanowires (NWs) are a promising platform for the integration of Si and compound semiconductors since their limited surface area can alleviate such material mismatch issues. Here, we demonstrate facet-selective growth of cadmium sulfide (CdS) on Si NWs. Aberration-corrected transmission electron microscopy analysis shows that crystalline CdS is grown epitaxially on the {111} and {110} surface facets of the Si NWs but that the Si{113} facets remain bare. Further analysis of CdS on Si NWs grown at higher deposition rates to yield a conformal shell reveals a thin oxide layer on the Si{113} facet. This observation and control experiments suggest that facet-selective growth is enabled by the formation of an oxide, which prevents subsequent shell growth on the Si{113} NW facets. Further studies of facet-selective epitaxial growth of CdS shells on micro-to-mesoscale wires, which allows tuning of the lateral width of the compound semiconductor layer without lithographic patterning, and InP shell growth on Si NWs demonstrate the generality of our growth technique. In addition, photoluminescence imaging and spectroscopy show that the epitaxial shells display strong and clean band edge emission, confirming their high photonic quality, and thus suggesting that facet-selective epitaxy on NW substrates represents a promising route to integration of compound semiconductors on Si