The torus: an exercise in constructing a processing surface

A "Processing Surface" is defined as a large, dense, and regular arrangement of processor and storage modules on a two-dimensional surface, e.g. a VLSI chip. A general method is described for distributing parallel recursive computations over such a surface. Scope rules enforcing the "locality" of variables and procedure parameters are introduced in the programming language. These rules and a particular interconnection of the modules on the surface make it possible to transmit parameter and variable values between modules without using extraneous communication actions. The choice of the Processing Surface topology for binary recursive computations is discussed and a torus-like topology is chosen

Method of determining the process applied for feature machining : experimental validation of a slot

In this paper, we will be evaluating the "manufacturability" levels for several machining processes of "slot" feature. Using the STEP standard, we will identify the slot feature characteristics. Then, using the ascendant generation of process method, we will define the associated milling process. The expertise is based on a methodology relative to the experience plans carried out during the formalization and systematic evaluation of the machining process associated with the feature

Large deviations for near-extreme eigenvalues in the beta-ensembles

For beta ensembles with convex poynomial potentials, we prove a large deviation principle for the empirical spectral distribution seen from the rightmost particle. This modified spectral distribution was introduced by Perret and Schehr (J. Stat. Phys. 2014) to study the crowding near the maximal eigenvalue, in the case of the GUE. We prove also convergence of fluctuations.Comment: We fixed typos and changed Remarks 2.13 and 2.1

Quasi-Delay-Insensitive Circuits are Turing-Complete

Quasi-delay-insensitive (QDI) circuits are those whose correct operation does not depend on the delays of operators or wires, except for certain wires that form isochronic forks. In this paper we show that quasi-delay-insensitivity, stability and noninterference, and strong confluence are equivalent properties of a computation. In particular, this shows that QDI computations are deterministic. We show that the class of Turing-computable functions have QDI implementations by constructing a QDI Turing machine

Asynchronous Nano-Electronics: Preliminary Investigation

This paper is a preliminary investigation in implementing asynchronous QDI logic in molecular nano-electronics, taking into account the restricted geometry, the lack of control on transistor strengths, the high timing variations. We show that the main building blocks of QDI logic can be successfully implemented; we illustrate the approach with the layout of an adder stage. The proposed techniques to improve the reliability of QDI apply to nano-CMOS as well

Truncations of Haar distributed matrices, traces and bivariate Brownian bridges

Let U be a Haar distributed unitary matrix in U(n)or O(n). We show that after centering the double index process $$W^{(n)} (s,t) = \sum_{i \leq \lfloor ns \rfloor, j \leq \lfloor nt\rfloor} |U_{ij}|^2$$ converges in distribution to the bivariate tied-down Brownian bridge. The proof relies on the notion of second order freeness.Comment: Random matrices: Theory and Applications (RMTA) To appear (2012) http://www.editorialmanager.com/rmta

Asynchronous techniques for system-on-chip design

SoC design will require asynchronous techniques as the large parameter variations across the chip will make it impossible to control delays in clock networks and other global signals efficiently. Initially, SoCs will be globally asynchronous and locally synchronous (GALS). But the complexity of the numerous asynchronous/synchronous interfaces required in a GALS will eventually lead to entirely asynchronous solutions. This paper introduces the main design principles, methods, and building blocks for asynchronous VLSI systems, with an emphasis on communication and synchronization. Asynchronous circuits with the only delay assumption of isochronic forks are called quasi-delay-insensitive (QDI). QDI is used in the paper as the basis for asynchronous logic. The paper discusses asynchronous handshake protocols for communication and the notion of validity/neutrality tests, and completion tree. Basic building blocks for sequencing, storage, function evaluation, and buses are described, and two alternative methods for the implementation of an arbitrary computation are explained. Issues of arbitration, and synchronization play an important role in complex distributed systems and especially in GALS. The two main asynchronous/synchronous interfaces needed in GALS-one based on synchronizer, the other on stoppable clock-are described and analyzed

Virtual manufacturing: prediction of work piece geometric quality by considering machine and set-up

Lien vers la version éditeur: http://www.tandfonline.com/doi/full/10.1080/0951192X.2011.569952#.U4yZIHeqP3UIn the context of concurrent engineering, the design of the parts, the production planning and the manufacturing facility must be considered simultaneously. The design and development cycle can thus be reduced as manufacturing constraints are taken into account as early as possible. Thus, the design phase takes into account the manufacturing constraints as the customer requirements; more these constraints must not restrict the creativity of design. Also to facilitate the choice of the most suitable system for a specific process, Virtual Manufacturing is supplemented with developments of numerical computations (Altintas et al. 2005, Bianchi et al. 1996) in order to compare at low cost several solutions developed with several hypothesis without manufacturing of prototypes. In this context, the authors want to predict the work piece geometric more accurately by considering machine defects and work piece set-up, through the use of process simulation. A particular case study based on a 3 axis milling machine will be used here to illustrate the authors’ point of view. This study focuses on the following geometric defects: machine geometric errors, work piece positioning errors due to fixture system and part accuracy

Precipitation kinetics of Al3Zr and Al3Sc in aluminum alloys modeled with cluster dynamics

Precipitation kinetics of Al3Zr and Al3Sc in aluminum supersaturated solid solutions is studied using cluster dynamics, a mesoscopic modeling technique which describes the various stages of homogeneous precipitation by a single set of rate equations. The only parameters needed are the interface free energy and the diffusion coefficient which are deduced from an atomic model previously developed to study the same alloys. A comparison with kinetic Monte Carlo simulations based on the vacancy diffusion mechanism shows that cluster dynamics correctly predicts the precipitation kinetics provided a size dependent interface free energy is used. It also manages to reproduce reasonably well existing experimental data.Comment: Acta Mater. (2005), in pres

A comparative evaluation of two algorithms of detection of masses on mammograms

In this paper, we implement and carry out the comparison of two methods of computer-aided-detection of masses on mammograms. The two algorithms basically consist of 3 steps each: segmentation, binarization and noise suppression using different techniques for each step. A database of 60 images was used to compare the performance of the two algorithms in terms of general detection efficiency, conservation of size and shape of detected masses.Comment: 9 pages, 5 figures, 1 table, Vol.3, No.1, February 2012,pp19-27; Signal & Image Processing : An International Journal (SIPIJ),201