2,383 research outputs found
Forbidden island heights in stress-driven coherent Stranski-Krastanov growth
The observed height distribution of clusters obtained in strained epitaxy has
been often interpreted in terms of electronic effects. We show that some
aspects can be explained classically by the interplay of strain and edge
energies. We find that soft materials can transform directly from monolayer
into thicker islands by two-dimensional (2D) multilayer nucleation and growth.
There is a critical thickness decreasing with the force constant. Thinner
islands are thermodynamically forbidden, due to the insufficient stress
relaxation upon clustering particularly under tensile stress. At sufficiently
large misfits the barrier for 2D multilayer nucleation is significantly smaller
than the barrier for subsequent single-layer nucleation. The effects are found
to be quantitatively reasonable and offer a plausible explanation for the
absence of thin islands and 2D growth of flattop islands usually attributed to
quantum size effects.Comment: 4 pages, 4 figures. Accepted version. Includes quantitative
estimations comparing with experiments plus minor change
Fault Testing for Reversible Circuits
Applications of reversible circuits can be found in the fields of low-power
computation, cryptography, communications, digital signal processing, and the
emerging field of quantum computation. Furthermore, prototype circuits for
low-power applications are already being fabricated in CMOS. Regardless of the
eventual technology adopted, testing is sure to be an important component in
any robust implementation.
We consider the test set generation problem. Reversibility affects the
testing problem in fundamental ways, making it significantly simpler than for
the irreversible case. For example, we show that any test set that detects all
single stuck-at faults in a reversible circuit also detects all multiple
stuck-at faults. We present efficient test set constructions for the standard
stuck-at fault model as well as the usually intractable cell-fault model. We
also give a practical test set generation algorithm, based on an integer linear
programming formulation, that yields test sets approximately half the size of
those produced by conventional ATPG.Comment: 30 pages, 8 figures. to appear in IEEE Trans. on CA
Influence of Intra-cell Traffic on the Output Power of Base Station in GSM
In this paper we analyze the influence of intracell traffic in a GSM cell on the base station output power. It is proved that intracell traffic increases this power. If offered traffic is small, the increase of output power is equal to the part of intracell traffic. When the offered traffic and, as the result, call loss increase, the increase of output power becomes less. The results of calculation are verified by the computer simulation of traffic process in the GSM cell. The calculation and the simulation consider the uniform distribution of mobile users in the cell, but the conclusions are of a general nature
CUNICO-PATHOANATOMICAL COMPARISONS AND DIAGNOSTICAL ERRORS IN BRAIN STEM HEMORRHAGES
No abstract
Constant-degree graph expansions that preserve the treewidth
Many hard algorithmic problems dealing with graphs, circuits, formulas and
constraints admit polynomial-time upper bounds if the underlying graph has
small treewidth. The same problems often encourage reducing the maximal degree
of vertices to simplify theoretical arguments or address practical concerns.
Such degree reduction can be performed through a sequence of splittings of
vertices, resulting in an _expansion_ of the original graph. We observe that
the treewidth of a graph may increase dramatically if the splittings are not
performed carefully. In this context we address the following natural question:
is it possible to reduce the maximum degree to a constant without substantially
increasing the treewidth?
Our work answers the above question affirmatively. We prove that any simple
undirected graph G=(V, E) admits an expansion G'=(V', E') with the maximum
degree <= 3 and treewidth(G') <= treewidth(G)+1. Furthermore, such an expansion
will have no more than 2|E|+|V| vertices and 3|E| edges; it can be computed
efficiently from a tree-decomposition of G. We also construct a family of
examples for which the increase by 1 in treewidth cannot be avoided.Comment: 12 pages, 6 figures, the main result used by quant-ph/051107
Gate-Level Simulation of Quantum Circuits
While thousands of experimental physicists and chemists are currently trying
to build scalable quantum computers, it appears that simulation of quantum
computation will be at least as critical as circuit simulation in classical
VLSI design. However, since the work of Richard Feynman in the early 1980s
little progress was made in practical quantum simulation. Most researchers
focused on polynomial-time simulation of restricted types of quantum circuits
that fall short of the full power of quantum computation. Simulating quantum
computing devices and useful quantum algorithms on classical hardware now
requires excessive computational resources, making many important simulation
tasks infeasible. In this work we propose a new technique for gate-level
simulation of quantum circuits which greatly reduces the difficulty and cost of
such simulations. The proposed technique is implemented in a simulation tool
called the Quantum Information Decision Diagram (QuIDD) and evaluated by
simulating Grover's quantum search algorithm. The back-end of our package,
QuIDD Pro, is based on Binary Decision Diagrams, well-known for their ability
to efficiently represent many seemingly intractable combinatorial structures.
This reliance on a well-established area of research allows us to take
advantage of existing software for BDD manipulation and achieve unparalleled
empirical results for quantum simulation
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