Applications of reversible circuits can be found in the fields of low-power
computation, cryptography, communications, digital signal processing, and the
emerging field of quantum computation. Furthermore, prototype circuits for
low-power applications are already being fabricated in CMOS. Regardless of the
eventual technology adopted, testing is sure to be an important component in
any robust implementation.
We consider the test set generation problem. Reversibility affects the
testing problem in fundamental ways, making it significantly simpler than for
the irreversible case. For example, we show that any test set that detects all
single stuck-at faults in a reversible circuit also detects all multiple
stuck-at faults. We present efficient test set constructions for the standard
stuck-at fault model as well as the usually intractable cell-fault model. We
also give a practical test set generation algorithm, based on an integer linear
programming formulation, that yields test sets approximately half the size of
those produced by conventional ATPG.Comment: 30 pages, 8 figures. to appear in IEEE Trans. on CA