Switched Current Sigma-Delta Modulator with a New Comparator Structure Designed Based on VHDL-AMS Description

The paper presents a VHDL-AMS based approach to the Switched-Current (SI) Sigma-Delta Modulator design. The prototype VHDL-AMS description, with the help of elaborated EDA tools, is automatically translated into the SI realization. Another tool helps the designer to create the layout. The paper also describes a new current mode comparator, which is used in the design. Postlayout simulation results are presented

CMOS Perceptron for Vesicle Fusion Classification

Edge computing (processing data close to its source) is one of the fastest developing areas of modern electronics and hardware information technology. This paper presents the implementation process of an analog CMOS preprocessor for use in a distributed environment for processing medical data close to the source. The task of the circuit is to analyze signals of vesicle fusion, which is the basis of life processes in multicellular organisms. The functionality of the preprocessor is based on a classifier of full and partial fusions. The preprocessor is dedicated to operate in amperometric systems, and the analyzed signals are data from carbon nanotube electrodes. The accuracy of the classifier is at the level of 93.67%. The implementation was performed in the 65 nm CMOS technology with a 0.3 V power supply. The circuit operates in the weak-inversion mode and is dedicated to be powered by thermal cells of the human energy harvesting class. The maximum power consumption of the circuit equals 416 nW, which makes it possible to use it as an implantable chip. The results can be used, among others, in the diagnosis of precancerous conditions

On T1 reflex of topological space

Summary. This article contains a definition of T1 reflex of a topological space as a quotient space which is T1 and fulfils the condition that every continuous map f from a topological space T into S being T1 space can be considered as a superposition of two continuous maps: the first from T onto its T1 reflex and the last from T1 reflex of T into S. MML Identifier:T_1TOPSP. WWW:http://mizar.org/JFM/Vol10/t_1topsp.htm

Remote Prototyping of FPGA-Based Devices in the IoT Concept during the COVID-19 Pandemic

This paper presents a system for the remote design and testing of electronic circuits and devices with FPGAs during COVID-19 and similar lockdown periods when physical access to laboratories is not permitted. The system is based on the application of the IoT concept, in which the final device is a test board with an FPGA chip. The system allows for remote visual inspection of the board and the devices linked to it in the laboratory. The system was developed for remote learning taking place during the lockdown periods at Poznan University of Technology (PUT) in Poland. The functionality of the system is confirmed by two demonstration tasks (the use of the temperature and humidity DHT11 sensor and the design of a generator of sinusoidal waveforms) for students in the fundamentals of digital design and synthesis courses. The proposed solution allows, in part, to bypass the time-consuming simulations, and accelerate the process of prototyping digital circuits by remotely accessing the infrastructure of the microelectronics laboratory

CMOS Perceptron for Vesicle Fusion Classification

Edge computing (processing data close to its source) is one of the fastest developing areas of modern electronics and hardware information technology. This paper presents the implementation process of an analog CMOS preprocessor for use in a distributed environment for processing medical data close to the source. The task of the circuit is to analyze signals of vesicle fusion, which is the basis of life processes in multicellular organisms. The functionality of the preprocessor is based on a classifier of full and partial fusions. The preprocessor is dedicated to operate in amperometric systems, and the analyzed signals are data from carbon nanotube electrodes. The accuracy of the classifier is at the level of 93.67%. The implementation was performed in the 65 nm CMOS technology with a 0.3 V power supply. The circuit operates in the weak-inversion mode and is dedicated to be powered by thermal cells of the human energy harvesting class. The maximum power consumption of the circuit equals 416 nW, which makes it possible to use it as an implantable chip. The results can be used, among others, in the diagnosis of precancerous conditions