494 research outputs found

    Discrimination of surface and volume states in fully depleted field-effect devices on thick insulator substrates

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    The behavior of electronic devices fabricated on thin, lightly doped semiconductor layers can be significantly influenced by very low levels of non-ideal charge states. Such devices typically operate in a fully depleted mode, and can exhibit significantly different electrical properties and characteristics than their bulk material counterparts. Traditional interpretation of device characteristics may identify the existence of such non-idealities, but fail to ascertain if the origin is from within the semiconductor layer or associated with the interfaces to adjacent dielectric materials. This leads to ambiguity in how to rectify the behavior and improve device performance. Characterizing non-idealities through electrical means requires adaptations in both measurement techniques and data interpretation. Some of these adaptations have been applied in material systems like silicon-on-insulator (SOI), however in systems where the semiconductor film becomes increasingly isolated on very thick insulators (i.e., glass), the device physics of operation presents new challenges. Overcoming the obstacles in interpretation can directly aid the technology development of thin semiconductor films on thick insulator substrates. The investigation is initiated by isolating the interface of crystalline silicon bonded to a thick boro-aluminosilicate glass insulator. The interface is studied through traditional bulk capacitance-voltage (C-V) methods, and the electrical fragility of the interface is exposed. This reveals the necessity to discriminate between interface states and bulk defect states. To study methods of discrimination, the physics of field-effect devices fabricated on isolated semiconducting films is explained. These devices operate in a fully depleted state; expressions that describe the C-V relationship with a single gate electrode are derived and explored. The discussion presents an explanation of how surface and volume charge states each contribute to the C-V characteristic behavior. Application of this adapted C-V theory is then applied to the gated-diode, a novel device which has proven to be instrumental in charge state discrimination. Through this adaptation, the gated-diode is used to extract recombination-generation parameters isolated to the top surface, bottom surface and within the volume of the film. The methodology is developed through an exploration of devices fabricated on SOI and silicon-on-glass (SiOG) substrates, and furthers the understanding needed to improve material quality and device performance

    Development and modeling of a low temperature thin-film CMOS on glass

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    The push to develop integrated systems using thin-film transistors (TFT) on insulating substrates (i.e. glass) has always been limited due to low-mobility semiconducting films such as amorphous and polycrystalline silicon. Corning Incorporated is developing a new substrate material known as silicon-on-glass (SiOG). It is intrinsically better than amorphous and polycrystalline silicon materials due to its single crystal nature of the silicon film. This however does not mitigate the challenges associated with low temperature CMOS process and fabrication. The first generation of TFTs fabricated at RIT showed the potential of SiOG as a viable substrate material, but were plagued by considerable short comings such as high leakage and low transconductance. As part of this study, refinements to TFT processing on SiOG have demonstrated significant improvement to TFT performance and uniformity, showing increase transconductanace/mobility, lower subthreshold swing, tighter VT distributions, and near symmetrical NFET and PFET operation about 0 V. With these improvements minimal steps have been added to the manufacturing process, keeping simple and adoptable by the flat panel display (FPD) industry. Device modeling clearly demonstrates the key areas important to electrical operation, such as dopant activation, interface charge/trap reduction, and workfunction engineering. It addition, modeling and simulation have helped to explain the governing physics of device operation explaining non-ideal effects such as gate induced drain leakage (GIDL) and various mobility degradation mechanism. An overview of device design, process refinements and device operation is presented. Process modifications and resulting benefits are discussed along with CMOS integration on SiOG

    Hiring and Training Work-Study Students: A Case Study

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    This paper describes the implementation of a comprehensive hiring and training program for library work-study students designed to reduce the time spent on individual training. After staff reductions, Marygrove College Library in Detroit, Michigan turned to an underutilized resource--work-study students. Formerly, training these students took so much permanent staff time that the library questioned investing so much effort on a contingent work force. With the cuts, the library reconsidered the value of work-study employees and devised a hiring and training program to choose the best candidates for the position and to reduce the effort full-time staff spent training new workers

    A TCAD calibrated approach for on-state modeling of amorphous oxide semiconductor TFTs

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    Amorphous oxide semiconductor materials such as IGZO exhibit electrical characteristics that are not well represented by conventional device models due to the presence of band-tail states (BTS). Common parameters such as threshold voltage and channel mobility that are extracted from measured electrical characteristics can be misrepresentative due to discrepancies between the device operation and the chosen operational model. Compact models that have been developed for model accuracy and circuit simulation efficiency offer limited insight on the underlying device physics involved. The focus of this work is a model for device engineering which maintains a close physical connection to device operation, and captures the 2D influence of both the gate and drain bias conditions on the ionization and deionization of acceptor-like BTS near the conduction band edge. A device model for the on-state operation of accumulation-mode IGZO TFTs was recently presented as an adaptation of a Level 2 SPICE (L2S) model [1]. The model introduced channel charge adjustments which account for the occupancy of BTS as influenced by the gate and drain voltage, and provided an exceptional match to both simulated and measured device characteristics. However the integrity of the model as assessed by the ability to discriminate between the influence of BTS and short-channel effects (SCE) was compromised as the device channel length was decreased. Accumulation-mode devices are susceptible to the onset of SCE at relatively long channel lengths due to the lack of a source-channel junction barrier. While the subthreshold region may show minimal influence of drain induced barrier lowering (DIBL), the on-state may exhibit an effective decrease in the triode region of operation. A new model is presented which incorporates this on-state DIBL along with channel length modulation, and demonstrates improved discrimination between BTS and SCE in the model fit at device channel lengths L ≥ 3 µm. Silvaco® Atlas™ TCAD played a key role in device model development. A long-channel reference device was used to establish the impact of SCE on short devices, which was then modeled by and terms in associated triode and saturation regions of operation. For channel lengths L \u3c 3 µm, a lumped SCE multiplier was used to represent short-channel behavior, followed by the application of BTS parameters for channel charge adjustments. Modeling results derived from both simulated and measured TFT characteristics will be presented. [1] K.D. Hirschman, T. Mudgal, E. Powell and R.G. Manley, ECS Trans. 86, 153 (2018

    Inner-ear abnormalities and their functional consequences in Belgian Waterslager canaries (Serinus canarius)

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    Recent reports of elevated auditory thresholds in canaries of the Belgian Waterslager strain have shown that this strain has an inherited auditory deficit in which absolute auditory thresholds at high frequencies (i.e. above 2.0 kHz) are as much as 40 dB less sensitive than the thresholds of mixed-breed canaries and those of other strains. The measurement of CAP audiograms showed that the hearing deficit is already present at the level of the auditory nerve (Gleich and Dooling, 1992). Here we show gross abnormalities in the anatomy of the basilar papilla of Belgian Waterslager canaries at the level of the hair cell. The extent of these abnormalities was correlated with the amount of hearing deficit as measured behaviorally

    Vibrational and electronic entropy of β-cerium and γ-cerium measured by inelastic neutron scattering

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    Time-of-flight (TOF) inelastic neutron-scattering spectra were measured on β-cerium (double hcp) and γ-cerium (fcc) near the phase-transition temperature. Phonon densities of states (DOS) and crystal-field levels were extracted from the TOF spectra. A softening of the phonon DOS occurs in the transition from β- to γ-cerium, accounting for an increase in vibrational entropy of ΔSvibγ-β=(0.09±0.05)kB/atom. The entropy calculated from the crystal-field levels and a fit to calorimetry data from the literature were significantly larger in β-cerium than in γ-cerium below room temperature, but the difference was found to be negligible at the experimental phase-transition temperature. A contribution to the specific heat from Kondo spin fluctuations was consistent with the quasielastic magnetic scattering, but the difference between phases was negligible. To be consistent with the latent heat of the β-γ transition, the increase in vibrational entropy at the phase transition may be accompanied by a decrease in electronic entropy not associated with the crystal-field splitting or spin fluctuations. At least three sources of entropy need to be considered for the β-γ transition in cerium

    Design and Fabrication of a Micro-Size Thermionic Ionization/Flame Ionization Detector for Gas Phase Chemical Analytes

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    A simple, MEMS base micro-chemical detector utilizing the principles of gas ionization, has been designed and fabricated. The device contains a polysilicon micro air-bridge heater structure with integrated polysilicon electrodes. The design of the devices allows it not only functions via thermionic emission, but also via chemi-ionization if a proper Pt catalyst is applied and it is operated in an environment containing hydrogen. When properly biased the device has been shown to heat to high temperatures where thermionic emission can begin to occur. Hydrocarbon chemicals in the gas phase have shown to ionize, via thermionic ionization and have been collected, producing a measurable current signal
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