MOFSET Modeling Gets Physical

The importance of obtaining a compact analytical MOSFET model with physical model parameters is increasing with the complexity of IC design and by pushing the technology to its limit. Here we have reviewed the known modeling approaches and demonstrated that the surface-potential description based on the drift-diffusion approximation is practical and able to satisfy the foreseeable future requirements. It consequently opens a viable way to secure the robustness and reliability of circuit simulation results for future sub-100 nm MOSFET generations

Variation Analysis of CMOS Technologies Using Surface-Potential MOSFET Model

An analysis of the measured macroscopic withinwafer variations for threshold voltage (Vth) and on-current (Ion) over several technology generations (180 nm, 100 nm and 65 nm) is reported. It is verified that the dominant microscopic variations of the MOSFET device can be extracted quantitatively from these macroscopic variation data by applying the surface-potential compact model Hiroshima University STARC IGFET model 2 (HiSIM2), which is presently brought into industrial application. Only a small number of microscopic parameters, representing substrate doping (NSUBC), pocket-implantation doping (NSUBP), carrier-mobility degradation due to gate-interface roughness (MUESR1) and channel-length variation during the gate formation (XLD) are found sufficient to quantitatively reproduce the measured macroscopic within-wafer variations of Vth and Ion for all channel length Lg and all technology generations. Quantitative improvements from 180 nm to 65 nm are confirmed to be quite large for MUESR1 (about 70%) and Lmin(XLD) (55%) variations, related to the gate-oxide interface and the gate-stack structuring, respectively. On the other hand, doping-related technology advances, which are reflected by the variation magnitudes of NSUBC (30%) and NSUBP (25%), are found to be considerably smaller. Furthermore, specific combinations of extreme microscopic parameter-variation values are able to represent the boundaries of macroscopic fabrication inaccuracies for Vth and Ion. These combinations are found to remain identical, not only for all Lg of a given technology node, but also for all investigated technologies with minimum Lg of 180 nm, 100 nm and 65 nm

Hydroelastic Behavior of Floating Artificial Islands

A new method to analyze the response of a thin elastic plate of large horizontal size floating waves is presented. Huge horizontal size and small thickness of it are typical of the recent design of floating airport. A benefit of the new method is that we need not the modal analysis of the body detection, and the solution of a hydrodynamic boundary value problem and the solution for the body motion including the elastic detection are simultaneously obtained. Some results of numerical implementation of the method are presented

HiSIM: A drift-diffusion-based advanced MOSFET model for circuit simulation with easy parameter extraction”

Abstmct-We present here the MOSFET-model HiSIM. Since HiSIM employs the drift-diffusion approximation and preserves a correct modeling of the surface potential in the channel, it is not only accurate. Additionally modelparameter number is small, parameter interdependence is removed, and parameter extraction becomes easy. Measured current-voltage characteristics of advanced MOSFETs is thus reproduced with only 19 model parameters

Modeling of degradation caused by channel hot carrier and negative bias temperature instability effects in p-MOSFETs

Modeling of channel hot carrier and negative bias temperature instability effects in p-MOSFETs is developed in this work. By calculating the vertical gate oxide field as well as the maximum lateral channel field, the non-monotonic threshold voltage degradation is accurately predicted. This model shows good agreements with measured data under various gate lengths, the stress biases, as well as time duration conditions. © 2012 IEEE

Development of multi-gate MOSFET models for circuit simulation with a compact modeling platform

Research is reported that aims at a framework for efficient development of multi-gate MOSFET models for circuit simulation and is carried out in an international collaboration among different research teams. A common platform for compact-model development, based on the Verilog-A language, is also constructed to verify as well as to efficiently merge the individual contributions from each collaborator into the final completed compact model. Copyright © 2008 by Department of Microelectronics & Computer Science, Technical University of Lodz