55 research outputs found

    Control of doped layers in p-i-n microcrystalline solar cells fully deposited with HWCVD

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    In this paper, the influence of the deposition conditions on the performance of p-i-n microcrystalline silicon solar cells completely deposited by hot-wire chemical vapor deposition is studied. With this aim, the role of the doping concentration, the substrate temperature of the p-type layer and of amorphous silicon buffer layers between the p/i and i/n microcrystalline layers is investigated. Best results are found when the p-type layer is deposited at a substrate temperature of 125 °C. The dependence seen of the cell performance on the thickness of the i layer evidenced that the efficiency of our devices is still limited by the recombination within this layer, which is probably due to the charge of donor centers most likely related to oxygen

    Surface passivation of crystalline silicon by Cat-CVD amorphous and nanocrystalline thin silicon films

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    In this work, we study the electronic surface passivation of crystalline silicon with intrinsic thin silicon films deposited by Catalytic CVD. The contactless method used to determine the effective surface recombination velocity was the quasi-steady-state photoconductance technique. Hydrogenated amorphous and nanocrystalline silicon films were evaluated as passivating layers on n- and p-type float zone silicon wafers. The best results were obtained with amorphous silicon films, which allowed effective surface recombination velocities as low as 60 and 130 cms -1 on p- and n-type silicon, respectively. To our knowledge, these are the best results ever reported with intrinsic amorphous silicon films deposited by Catalytic CVD. The passivating properties of nanocrystalline silicon films strongly depended on the deposition conditions, especially on the filament temperature. Samples grown at lower filament temperatures (1600 °C) allowed effective surface recombination velocities of 450 and 600 cms -1 on n- and p-type silicon

    Progress in single junction microcrystalline silicon solar cells deposited by Hot-Wire CVD

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    Hot-Wire Chemical Vapor Deposition has led to microcrystalline silicon solar cell efficiencies similar to those obtained with Plasma Enhanced CVD. The light-induced degradation behavior of microcrystalline silicon solar cells critically depends on the properties of their active layer. In the regime close to the transition to amorphous growth (around 60% of amorphous volume fraction), cells incorporating an intrinsic layer with slightly higher crystalline fraction and [220] preferential orientation are stable after more than 7000 h of AM1.5 light soaking. On the contrary, solar cells whose intrinsic layer has a slightly lower crystalline fraction and random or [111] preferential orientation exhibit clear light-induced degradation effects. A revision of the efficiencies of Hot-Wire deposited microcrystalline silicon solar cells is presented and the potential efficiency of this technology is also evaluated

    Optimisation of doped microcrystalline silicon films deposited at very low temperatures by Hot-Wire CVD

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    In this paper we present new results on doped μc-Si:H thin films deposited by hot-wire chemical vapour deposition (HWCVD) in the very low temperature range (125-275°C). The doped layers were obtained by the addition of diborane or phosphine in the gas phase during deposition. The incorporation of boron and phosphorus in the films and their influence on the crystalline fraction are studied by secondary ion mass spectrometry and Raman spectroscopy, respectively. Good electrical transport properties were obtained in this deposition regime, with best dark conductivities of 2.6 and 9.8 S cm -1 for the p- and n-doped films, respectively. The effect of the hydrogen dilution and the layer thickness on the electrical properties are also studied. Some technological conclusions referred to cross contamination could be deduced from the nominally undoped samples obtained in the same chamber after p- and n-type heavily doped layers

    Shutterless deposition of phosphorous doped microcrystalline silicon by Cat-CVD

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    In this paper we present results on phosphorous-doped μc-Si:H by catalytic chemical vapour deposition in a reactor with an internal arrangement that does not include a shutter. An incubation phase of around 20 nm seems to be the result of the uncontrolled conditions that take place during the first stages of deposition. The optimal deposition conditions found lead to a material with a dark conductivity of 12.8 S/cm, an activation energy of 0.026 eV and a crystalline fraction of 0.86. These values make the layers suitable to be implemented in solar cells

    Optical analysis of textured plastic substrates to be used in thin silicon solar cells

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    Light confinement strategies in thin-film silicon solar cells play a crucial role in the performance of the devices. In this work, the possible use of Ag-coated stamped polymers as reflectors to be used in n-i-p solar cells is studied. Different random roughnesses (nanometer and micrometer size) have been transferred on poly(methylmethacrylate) (PMMA) by hot embossing. Morphological and optical analyses of masters, stamped polymers and reflectors have been carried out evidencing a positive surface transference on the polymer and the viability of a further application in solar cells

    Substrate influence on the properties of doped thin silicon layers grown by Cat-CVD

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    We present structural and electrical properties for p- and n-type layers grown close to the transition between a-Si:H and nc-Si:H onto different substrates: Corning 1737 glass, ZnO:Al-coated glass and stainless steel. Structural properties were observed to depend on the substrate properties for samples grown under the same deposition conditions. Different behaviour was observed for n- and p-type material. Stainless steel seemed to enhance crystallinity when dealing with n-type layers, whereas an increased crystalline fraction was obtained on glass for p-type samples. Electrical conduction in the direction perpendicular to the substrate seemed to be mainly determined by the interfaces or by the existence of an amorphous incubation layer that might determine the electrical behaviour. In the direction perpendicular to the substrate, n-type layers exhibited a lower resistance value than p-type ones, showing better contact properties between the layer and the substrate

    Photovoltaic performance of an ultrasmall band gap polymer

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    A conjugated polymer (PBTTQ) that consists of alternating electron-rich bithiophene and electron-deficient thiadiazoloquinoxaline units was synthesized via Yamamoto polymerization with Ni(cod)(2) and provides a band gap of 0.94 eV. This represents one of the smallest band gaps obtained for a soluble conjugated polymer. When applied in a bulk heterojunction solar cell together with [84]PCBM as the electron acceptor, the polymer affords a response up to 1.3 mu m

    Top-gate microcrystalline silicon TFTs processed at low temperature (<200ºC)

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    N-type as well P-type top-gate microcrystalline silicon thin film transistors (TFTs) are fabricated on glass substrates at a maximum temperature of 200 °C. The active layer is an undoped μc-Si film, 200 nm thick, deposited by Hot-Wire Chemical Vapor. The drain and source regions are highly phosphorus (N-type TFTs) or boron (P-type TFTs)-doped μc-films deposited by HW-CVD. The gate insulator is a silicon dioxide film deposited by RF sputtering. Al-SiO 2-N type c-Si structures using this insulator present low flat-band voltage,-0.2 V, and low density of states at the interface D it=6.4×10 10 eV -1 cm -2. High field effect mobility, 25 cm 2/V s for electrons and 1.1 cm 2/V s for holes, is obtained. These values are very high, particularly the hole mobility that was never reached previously

    Low temperature amorphous and nanocrystalline silicon thin film transistors deposited by Hot-Wire CVD on glass substrate

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    Amorphous and nanocrystalline silicon films obtained by Hot-Wire Chemical Vapor Deposition have been incorporated as active layers in n-type coplanar top gate thin film transistors deposited on glass substrates covered with SiO 2. Amorphous silicon devices exhibited mobility values of 1.3 cm 2 V - 1 s - 1, which are very high taking into account the amorphous nature of the material. Nanocrystalline transistors presented mobility values as high as 11.5 cm 2 V - 1 s - 1 and resulted in low threshold voltage shift (∼ 0.5 V)
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