Artificial neural network-based 4-d hyper-chaotic system on field programmable

In this presented study, a 4-D hyper-chaotic system newly proposed to the literature, has been implemented as Multi-Layer Feed-Forward Artificial Neural Network-based on FPGA chip with 32-bit IEEE-754-1985 floating-point number standard to be utilized in real time chaos-based applications. In the first step of the study, 4-D hyper-chaotic system has been numerically modeled on FPGA using Dormand-Prince numeric algorithm. In the second step, the data set (4X10,000) obtained from Matlab-based numeric model has been divided into two parts as training data set (4X8,000) and test data set (4X2,000) to create ANN-based 4-D hyper-chaotic system. A Multi-Layer Feed-Forward ANN structure with 4 inputs and 4 outputs has been constructed for ANN-based 4-D hyper-chaotic system. This structure has only one hidden layer and there are 8 neurons having Tangent Sigmoid activation function used as the activation function in each neuron. 2.58E-07 Mean Square Error (MSE) value has been obtained from the training of ANN-based 4-D hyper-chaotic system. In the third step, after the successful training of ANN-based 4-D hyper-chaotic system, the design of ANN-based 4-D hyper-chaotic system has been carried out on FPGA by taking the bias and weight values of the ANN structure as reference. In this step, at first, Matlab-based Feed-Forward Multi-Layer 4X8X4 network structure has been coded in Very High Speed Integrated Circuit Hardware Description Language (VHDL) to be implemented on FPGA chips. Then, the bias and weight values of the ANN structure has been converted from decimal number system to floating-point number standard and these converted values have been embedded into the network structure. In the last step, the ANN-based 4-D hyper-chaotic system designed on FPGA has been synthesized and tested using Xilinx ISE Design Suite. The chip statistics have been given after the Place&Route process carried out for the Virtex XC6VHX255T-3FF1155 FPGA chip. The maximum operating frequency of ANN-based 4-D hyper-chaotic system on FPGA has been obtained as 240.861 MHZ. © 2020, Ismail Saritas. All rights reserved.2-s2.0-8509148055

Design and implementation of arrhythmic ECG signals for biomedical engineering applications on FPGA

In this study, eight arrhythmic ECG signals from vital signals [sinus tachycardia, supraventricular tachycardia, premature ventricular complex (PVC), atrial fibrillation, AV block: 3rd degree, ventricular fibrillation, sinus bradycardia, first-degree AV block] were designed mathematically, and then modelled on FPGA by VHDL and Xilinx-Vivado software. The mathematical extrapolation of the signals was created in accordance with the literature and after examining the time and amplitude values of many ECG signals from the Physiobank ATM section of the MIT-BIH (Massachusetts Institute of Technology-Beth Israel Hospital) arrhythmia database. These signals were synthesized for the Zynq-7000 XC7Z020 FPGA chip for using in biomedical calibration applications and ECG simulators. The ECG signals were modelled with a 14-bit AD9767 DAC module that worked in coherence with this development board, and observed in real-time by 4 channel oscilloscope. Matlab-based ECG signals were taken as reference and compared with the results obtained from the FPGA-based ECG signals design. The FPGA chip resource consumption values obtained after the place–route process, the test results obtained from the design, the MSE (mean squared error) values of the designed signals, the operating frequencies of the system and each signal have been presented. The maximum operating speed of this system is 651.827 MHz. In this study, it has been shown that FPGA-based ECG signal generation system can be implemented on FPGA chips, and the designed system can be safely used in ECG simulators