27 research outputs found

    An Overview of MCC and Its Research

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    Viewgraphs on Microelectronics and Computer Technology Corporation (MCC) are presented. The MCC is a cooperative enterprise whose mission is to strengthen and sustain America's competitiveness in information technologies. Their objective is excellence in meeting broad industry needs through application-driven research, development, and timely deployment of innovative technology. Research programs include: software technology; VLSI/computer aided design; packaging/interconnect; electronic applications of high temperature superconductors; and advanced computing technology

    Array processor architecture connection network

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    A connection network is disclosed for use between a parallel array of processors and a parallel array of memory modules for establishing non-conflicting data communications paths between requested memory modules and requesting processors. The connection network includes a plurality of switching elements interposed between the processor array and the memory modules array in an Omega networking architecture. Each switching element includes a first and a second processor side port, a first and a second memory module side port, and control logic circuitry for providing data connections between the first and second processor ports and the first and second memory module ports. The control logic circuitry includes strobe logic for examining data arriving at the first and the second processor ports to indicate when the data arriving is requesting data from a requesting processor to a requested memory module. Further, connection circuitry is associated with the strobe logic for examining requesting data arriving at the first and the second processor ports for providing a data connection therefrom to the first and the second memory module ports in response thereto when the data connection so provided does not conflict with a pre-established data connection currently in use

    Array processor architecture

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    A high speed parallel array data processing architecture fashioned under a computational envelope approach includes a data base memory for secondary storage of programs and data, and a plurality of memory modules interconnected to a plurality of processing modules by a connection network of the Omega gender. Programs and data are fed from the data base memory to the plurality of memory modules and from hence the programs are fed through the connection network to the array of processors (one copy of each program for each processor). Execution of the programs occur with the processors operating normally quite independently of each other in a multiprocessing fashion. For data dependent operations and other suitable operations, all processors are instructed to finish one given task or program branch before all are instructed to proceed in parallel processing fashion on the next instruction. Even when functioning in the parallel processing mode however, the processors are not locked-step but execute their own copy of the program individually unless or until another overall processor array synchronization instruction is issued

    Automatic Management of Parallel and Distributed System Resources

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    Viewgraphs on automatic management of parallel and distributed system resources are presented. Topics covered include: parallel applications; intelligent management of multiprocessing systems; performance evaluation of parallel architecture; dynamic concurrent programs; compiler-directed system approach; lattice gaseous cellular automata; and sparse matrix Cholesky factorization

    PDP-8/103A Dataphone interface: memorandum

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    http://deepblue.lib.umich.edu/bitstream/2027.42/6385/5/bad0620.0001.001.pdfhttp://deepblue.lib.umich.edu/bitstream/2027.42/6385/4/bad0620.0001.001.tx

    PDP-8

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    http://deepblue.lib.umich.edu/bitstream/2027.42/6384/5/bad0555.0001.001.pdfhttp://deepblue.lib.umich.edu/bitstream/2027.42/6384/4/bad0555.0001.001.tx

    PDP-7

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    http://deepblue.lib.umich.edu/bitstream/2027.42/6388/5/bad0558.0001.001.pdfhttp://deepblue.lib.umich.edu/bitstream/2027.42/6388/4/bad0558.0001.001.tx

    DEC 338 light pen sense indicator : memorandum

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    http://deepblue.lib.umich.edu/bitstream/2027.42/6383/5/bad0615.0001.001.pdfhttp://deepblue.lib.umich.edu/bitstream/2027.42/6383/4/bad0615.0001.001.tx

    PDP-8 simulator

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    http://deepblue.lib.umich.edu/bitstream/2027.42/6387/5/bad0554.0001.001.pdfhttp://deepblue.lib.umich.edu/bitstream/2027.42/6387/4/bad0554.0001.001.tx
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