Correlation-induced symmetry-broken states in large-angle twisted bilayer graphene on MoS2

Strongly correlated states are commonly emerged in twisted bilayer graphene (TBG) with magic-angle, where the electron-electron (e-e) interaction U becomes prominent relative to the small bandwidth W of the nearly flat band. However, the stringent requirement of this magic angle makes the sample preparation and the further application facing great challenges. Here, using scanning tunneling microscopy (STM) and spectroscopy (STS), we demonstrate that the correlation-induced symmetry-broken states can also be achieved in a 3.45{\deg} TBG, via engineering this non-magic-angle TBG into regimes of U/W > 1. We enhance the e-e interaction through controlling the microscopic dielectric environment by using a MoS2 substrate. Simultaneously, the bandwidth of the low-energy van Hove singularity (VHS) peak is reduced by enhancing the interlayer coupling via STM tip modulation. When partially filled, the VHS peak exhibits a giant splitting into two states flanked the Fermi level and shows a symmetry-broken LDOS distribution with a stripy charge order, which confirms the existence of strong correlation effect in our 3.45{\deg} TBG. Our result paves the way for the study and application of the correlation physics in TBGs with a wider range of twist angle

Survey of ship platoon cooperative control

The ship platoon will become an important form of water transport in the future. This paper analyzes the characteristics and control principle of ship platoon cooperative control, and analyzes the current situation and methods in the four aspects of ship-shore cooperative platoon, platoon control model, platoon motion control and typical platoon applications. The current bottlenecks of ship platoon control technology are summarized, including human-machine fusion control, platoon motion control uncertainty modeling, platoon cooperative consistency control modeling, robust control under communication constraints and consistency control. In the future development of ship platoons, we should focus on solving the problems of platoon motion modeling based on data-driven and mechanism fusion, ship platoon control based on the biological group mechanism and the application of hierarchical control in ship platoon control

High-Density Vertical Transistors with Pitch Size Down to 20 nm.

Vertical field effect transistors (VFETs) have attracted considerable interest for developing ultra-scaled devices. In particular, individual VFET can be stacked on top of another and does not consume additional chip footprint beyond what is needed for a single device at the bottom, representing another dimension for high-density transistors. However, high-density VFETs with small pitch size are difficult to fabricate and is largely limited by the trade-offs between drain thickness and its conductivity. Here, a simple approach is reported to scale the drain to sub-10 nm. By combining 7 nm thick Au with monolayer graphene, the hybrid drain demonstrates metallic behavior with low sheet resistance of ≈100 Ω sq-1 . By van der Waals laminating the hybrid drain on top of 3 nm thick channel and scaling gate stack, the total VFET pitch size down to 20 nm and demonstrates a higher on-state current of 730 A cm-2 . Furthermore, three individual VFETs together are vertically stacked within a vertical distance of 59 nm, representing the record low pitch size for vertical transistors. The method pushes the scaling limit and pitch size limit of VFET, opening up a new pathway for high-density vertical transistors and integrated circuits

Wafer-scale and universal van der Waals metal semiconductor contact

Van der Waals (vdW) metallic contacts have been demonstrated as a promising approach to reduce the contact resistance and minimize the Fermi level pinning at the interface of two-dimensional (2D) semiconductors. However, only a limited number of metals can be mechanically peeled and laminated to fabricate vdW contacts, and the required manual transfer process is not scalable. Here, we report a wafer-scale and universal vdW metal integration strategy readily applicable to a wide range of metals and semiconductors. By utilizing a thermally decomposable polymer as the buffer layer, different metals were directly deposited without damaging the underlying 2D semiconductor channels. The polymer buffer could be dry-removed through thermal annealing. With this technique, various metals could be vdW integrated as the contact of 2D transistors, including Ag, Al, Ti, Cr, Ni, Cu, Co, Au, Pd. Finally, we demonstrate that this vdW integration strategy can be extended to bulk semiconductors with reduced Fermi level pinning effect