58 research outputs found

    Mechanical properties, microstructure and crystallographic texture of magnesium AZ91-D alloy welded by Friction Stir Welding (FSW)

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    The objective of the study was to characterize the properties of a magnesium alloy welded by friction stir welding (FSW). The results led to a better understanding of the relationship between this process and the microstructure and anisotropic properties of alloy materials. Welding principally leads to a large reduction in grain size in welded zones due to the phenomenon of dynamic recrystallization. The most remarkable observation was that crystallographic textures appeared from a base metal without texture in two zones: the thermo-mechanically affected and stir welded zones. The latter zone has the peculiarity of possessing a marked texture with two components on the basal plane and the pyramidal plane. These characteristics disappeared in the TMAZ, which had only one component following the basal plane. These modifications have been explained by the nature of the plastic deformation in these zones, which occurs at a moderate temperature in the TMAZ and high temperature in the SWZ

    Effect of welding laser process on macrostructures and the mechanical properties of coating steel DP600: Influence of vaporization zinc

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    International audienceThis paper presents an analysis of the shear strength evolution of laser welds. DP600 steel sheets, with a thin zinc coating, were welded in a lap joint configuration. With the aim of optimisation, it has been shown that the mechanical set up, i.e. weld gap and clamping force associated with speed and laser power, permit a significant increase in mechanical properties notably in shear strength when the zinc vaporization is optimized. This amelioration required a negative defocusing (−0.33 mm) and a minimal weld gap (0.2 mm) to allow zinc vapour to escape the weld pool and thus avoiding porosity. Equally it has been shown that the shear strength is directly linked to the geometrical properties of the weld bead, particularly at the gap between sheets and principally the control of the zinc vaporization. The relation between welding process parameters, mechanical set up parameters and the nature of the materials have been to control to obtain the best mechanical behaviour. © 2017 The Society of Manufacturing Engineer

    Study of metallurgic and mechanical properties of laser welded heterogeneous joints between DP600 galvanised steel and aluminium 6082

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    International audienceThis investigation focuses on the feasibility of heterogeneous welded joints between DP600 steel and aluminium 6082. The process adopted used a power laser in two modes: keyhole welding and laser-induced reactive wetting. All the results of the study show that the use of laser welding of galvanised sheets, in the keyhole mode, can achieve a joint shear strength of 140 MPa by optimising the process parameters and controlling the penetration, which must be limited to 600 lm. Another key factor with this welding method is control of the inter-sheet gap, which was achieved by using a clamping system that ensured a rigid joint while maintaining a constant gap sufficient to allow the escape of zinc vapour. This approach enabled an increase in shear strengths of 200 MPa to be obtained and the zinc acted as a beneficial factor to the welding process. With the laser-induced reactive wetting mode, the joint between galvanised sheets was more brittle because of the formation of a non-uniform reaction layer. With this mode, the presence of zinc is a factor that limits the growth of the reaction layer and, at the same time, leads to a mechanical deterioration of the joint; test results indicate that mechanical strength was limited to about 80 MPa

    Architectures Flexibles pour la Validation et L'exploration de Réseaux-sur-Puce

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    For A multiprocessor system-on-chip (MPSOC), the communication backbone is a central component of prime importance. This is due to the importance of the communications on such distributed systems. Now that networks-on-chip (NoCs) are admitted to be the solution which theoretically best solves the problem of on-chip communications, an important problem which rises consists in providing the designer with fast validation techniques able to tackle such complexes systems. Indeed, despite their regular architectures networks-in-chip internal interactions are difficult to formalize. On the other side, classical validation approaches are far from being suited for NoC-based systems due to their lack of flexibility and scalability. This thesis introduces a new concept in the field of hardware validation of networkson- chip; we have called this new concept “Inaccurate Hardware Emulation” in contrast with most hardware emulation approaches which assume a “cycle accurate bit accurate” precision. Our approach inherits from all advantages of hardware prototyping on reconfigurable devices and adds new scalability features. Study conducted during this thesis showed that under the non-congested regime a NoC may admit a number of alterations on its characteristics (introduced by the emulation platform) without adopting a completely different behavior. The multi-FPGA emulation technique proposed in this thesis is highly flexible since it relies on serial inter-FPGA interconnections. Serial interconnections are less sensitive to noises than parallel style of interconnections, and allow then for higher transfer rates. On the other hand, our emulation approaches does not poses any constraint on the emulation speed. If we consider the fact that serial interconnection schemes may introduce additional delays and the high speeds of the emulation process, performance of the NoC being emulated on the multi-FPGA emulator may deviate from the original NoC. We have studied this phenomenon and we have proposed various solutions for it.L'infrastructure de communication pour un système multiprocesseur mono-puce (MPSoC) est un organe central et de première importance. Cette importance s'explique par la place importante que tiennent les communications dans de tels systèmes distribués. Alors qu'il est maintenant admis que les réseaux -sur-puce (NoCs) constituent une solution théoriquement idéale, il se pose le problème de la validation de telles architectures complexes. En effet, malgré la régularité de leurs architectures, les réseaux-sur-puce restent des systèmes dont les interactions internes sont très difficiles à appréhender. Par ailleurs, les approches de validation classiquement employées sont très mal adaptées aux systèmes à base de NoC car très peu flexibles et très peu scalables. Cette thèse introduit un nouveau concept dans la validation matérielle des réseauxsur- puce, ce concept que nous avons appelé « émulation imprécise » contraste avec les approches d'émulation matérielles classiques qui sous-entendent toutes une précision au « cycle près, bit près ». Notre approche hérite de tous les avantages liés au prototypage matériel sur les plateformes reconfigurables et y ajoute un degré de flexibilité très élevé. En effet, l'étude menée au cours de ce travail sur le comportement des réseaux -sur-puce à commutation de paquets en régime non congestionné montre que, sous certaines conditions, des modifications des caractéristiques du NoC (introduites par la plateforme d'émulation elle même) peuvent être tolérées sans que pour autant le comportement du réseau ne change de façon radicale. La technique d'émulation multi-FPGA étudiée dans cette thèse est une technique très flexible car basée sur un mode d'interconnexions inter-FPGA série. Les interconnexions séries sont beaucoup moins sensibles aux phénomènes de parasitage que les interconnexions parallèles et par conséquent les vitesses de transferts sont beaucoup plus élevées. D'autre part la technique d'émulation que nous proposons ne pose aucune condition sur la vitesse du processus d'émulation lui-même. Considérant les délais additionnels induits pas les liaisons séries et les vitesses d'émulation très élevées, un phénomène de déviation des performances peut être observé d'où l'imprécision de l'émulation. Ce phénomène a été étudié dans le cadre de cette thèse et nous avons proposé plusieurs solutions afin d'y remédier.Mots cles : MEMS RF, interrupteur, modelisation, modele statistique, test, evaluation, regression lineaire
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