Development of the TOTEM Trigger System

A trigger system is the first part of a data analysis and it is an essential part of modern detectors. It processes and overviews all events in real time and activates an consecutive data acquisition, when defined criteria are satisfied. Thus the trigger system is critical for an consecutive offline data analysis. This work is focused on implementation and optimization of the trigger system of the TOTEM experiment. An integration of the CMS and TOTEM trigger systems for common physics program is also discussed

Development of the TOTEM Trigger System

Spouštěcí (triggerovací) systém je první krok při analýze dat a je nepostradatelnou součástí moderních detektorů. Vyhodnocuje a posuzuje všechny události v reálném čase a pokud jsou splněné stanovené podmínky, spouští vyčítání dat z detektoru. Z tohoto důvodu je kritický pro následnou analýzu dat. Tato práce se zaměřuje na implementaci a optimalizaci triggerovacího systému pro experiment TOTEM. Dále popisuje integraci triggerovacích systémů experimentů CMS a TOTEM pro společný fyzikální program.ObhájenoA trigger system is the first part of a data analysis and it is an essential part of modern detectors. It processes and overviews all events in real time and activates an consecutive data acquisition, when defined criteria are satisfied. Thus the trigger system is crit- ical for an consecutive offline data analysis. This work is focused on implementation and optimization of the trigger system of the TOTEM experiment. An integration of the CMS and TOTEM trigger systems for common physics program is also discussed

TOTEM Trigger System Firmware

This paper describes the TOTEM Trigger System Firmware that is operational at LHC since 2009. The TOTEM experiment is devoted to the forward hadronic physics at collision energy from 2.7 to 14TeV. It is composed of three different subdetectors that are placed at 9, 13.5, and 220m from the Interaction Point 5. A time-critical-logic firmware is implemented inside FPGA circuits to review collisions and to select the relevant ones to be stored by the Data Acquisition (DAQ). The Trigger system has been modified in the 2012-2013 LHC runs allowing the experiment to take data in cooperation with CMS

Broadband bias networks for pulse signal RF amplifiers

This article describes one possible solution of bias networks for special broadband RF amplifiers. The purpose is amplification special pulse signals from particle detectors, which demands well defined time domain properties. The problem is demonstrated on two basic prototypes with different amplifier chips used in. Both are designed using standard components with poor results and using special broadband inductors which gave much better results. At last, design and verification of the broadband inductors is presented

Development of a Digital Quench Detection System for Nb3_3Sn Magnets and First Measurements on Prototype Magnets

The High Luminosity upgrade for the Large Hadron Collider LHC (HL-LHC) requires new Nb$_3$Sn superconducting magnets and it triggers a development of novel hardware for the quench detection system (QDS) based on a field programmable gate array (FPGA) digital platform and a number of individually isolated analogue front-ends. Galvanic insulation has been implemented downstream the analogue to digital convertors to eliminate a usage of analogue isolation amplifiers. This concept was already successfully implemented in the current LHC QDS system, however the mitigation of new phenomena inside Nb$_3$Sn materials required development of a new generation of QDS. The newly developed universal QDS offers flexibility of firmware defined architecture. Adopted prototype driven strategy includes thorough characterization of the analogue front-ends in the laboratory and prototype unit measurements performed on HL-LHC magnet prototypes at CERN's superconducting magnet test facility SM18. The tests also reveal the characteristics of the magnets as well as the measurement electronics at an early stage. The test results are used to optimize the analogue input stages as well as the digital signal processing within the FPGA. The preliminary test results are presented and focus is given to the measurement and studies of the so-called “flux jumps” to mitigate the effects of these voltage perturbations in the QDS