24 research outputs found

    The truth about the 1st cycle Coulombic efficiency of LiNi 1/3_{1/3} Co 1/3_{1/3} Mn 1/3_{1/3} O 2_{2} (NCM) cathodes

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    The 1st cycle Coulombic efficiency (CE) of LiNi1/3Co1/3Mn1/3O2 (NCM) at 4.6 V vs. Li/Li+ has been extensively investigated in NCM/Li half cells. It could be proven that the major part of the observed overall specific capacity loss (in total 36.3 mA h g−1) is reversible and induced by kinetic limitations, namely an impeded lithiation reaction during discharge. A measure facilitating the lithiation reaction, i.e. a constant potential (CP) step at the discharge cut-off potential, results in an increase in specific discharge capacity of 22.1 mA h g−1. This capacity increase during the CP step could be proven as a relithiation process by Li+ content determination in NCM via an ICP-OES measurement. In addition, a specific capacity loss of approx. 4.2 mA h g−1 could be determined as an intrinsic reaction to the NCM cathode material at room temperature (RT). In total, less than 10.0 mA h g−1 (=28% of the overall capacity loss) can be attributed to irreversible reactions, mainly to irreversible structural changes of NCM. Thus, the impact of parasitic reactions, such as oxidative electrolyte decomposition, on the irreversible capacity is negligible and could also be proven by on-line MS. As a consequence, the determination of the amount of extracted Li+ (“Li+ extraction ratio”) so far has been incorrect and must be calculated by the charge capacity (=delithiation amount) divided by the theoretical capacity. In a NCM/graphite full cell the relithiation amount during the constant voltage (CV) step is smaller than in the half cell, due to irreversible Li+ loss at graphite

    Electrolyte Additives Improving the Cycling Stability and Reducing Degradation of LIB Cathodes at High Voltage & Some Simple Experiments Clarifying “Capacity Losses” at the Cathode

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    The goal of this work is the design of integrated circuits in order to efficiently draw images on a computer screen display. Ten years ago, we designed an LSI integrated circuit, which managed a screen buffer, and fastly drew vectors and characters, in an architecture of "graphic terminal". Then, we tried to optimize such an architecture, and to adapt it to a "workstation" environment. We are now convinced that the best way to do it is not to wire specialized algorithms, but to define fast generalized computing functions. In order to explain our evolution, we describe successive experimentations, preceded by a short history of display architectures.La motivation de ce travail est la réalisation de circuits permettant d'afficher rapidement des images sur un écran d'ordinateur. Voici dix ans, nous avons proposé un circuit LSI, prenant en charge la gestion d'une mémoire d'image et l'écriture rapide de segments de droite et de caractÚres, dans une optique de "terminal graphique". Nous avons ensuite cherché à augmenter les performances de cette architecture et à l'adapter à l'environnement "station de travail". Nous sommes aujourd'hui convaincu que la solution ne passe pas par des circuits spécialisés, mais par la définition d'opérateurs généraux de calcul trÚs puissants. Pour expliquer cet itinéraire, nous décrivons une suite d'expérimentations réalisées, précédée par une histoire des architectures de visualisation
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