Effects of ovary storage time on the quality and meiotic competence of cat oocytes

In this study the growth of Si and Si$_{1-x}$Ge$_{x}$ layers fabricated by LPCVD epitaxy was investigated with regard to the realization of extended CMOS devices. especially the vertical MOSFET and the n-MODFET. Main focus was the production of thin, threading-dislocation-free relaxed buffer layers which can be used as virtual substrates for strained Si layers. The pursued concept consists of a low-temperature Si$_{1-x}$Ge$_{x}$ layer beneath the intrinsic relaxed buffer layer. Optimizing the low-temperature buffer layer the threading dislocation density could be drastically reduced from 1 x 10$^{11}$ to 1 x 10$^{7}$ cm$^{-2}$. The second purpose of this study was the investigation of phosphorous-doped ni-layers for vertical MOSFETs. Using germane and a high-temperature desorption step the ni-doping could be reduced immediately after turning off the phosphine flow resulting in an improved doping profile (1430 to 50 nm/Dec.). Based on optimized layers, vertical n-MOSFETs with a channel length of 100 nm and a gate oxide thickness of 10 nm a transconductance of 200 mS/mm. High-frequency measurements resulted in cut-off frequencies of f$_{T}$ =8 GHz and f$_{max}$ =19 GHz