Dual-Band 8x8 Adaptive Array Antenna for 3.5/5 GHz

This paper gives  result analysis for the adaptive antenna array is expected to meet data rate requirement for 4G communication for Direct Sequence CDMA (DS-CDMA) antenna application.In this paper 4G smart planner dual band phase array suitable Long Term Evolution (LTE) at 3.5 GHz for fourth generation (4G)and also Wireless Local Area Network(WLAN) at 5GHz system isdeveloped. The proposed planar array antenna is build using micro strip U slotted patch antenna element. Separate feeding techniques are used for every element of the smart planar array antenna and elevation direction at Sixty degree phase shift absent of any grating lobes. At Sixty degree phase shift, the gain is to be 22.62dB without changing in the mutual coupling. In this single element and linear sub arrays with 1x2 and 1x4 dimension of this element are designed

IMPROVING STARTABILITY AND REDUCING EMISSIONS IN FLEXFUEL SPARK IGNITION DIRECT INJECTION VARIABLE CAM TIMING ENGINE

Experimental work and analysis was done to investigate engine startup robustness and emissions of a flex-fuel spark ignition (SI) direct injection (DI) engine. The vaporization and other characteristics of ethanol fuel blends present a challenge at engine startup. Strategies to reduce the enrichment requirements for the first engine startup cycle and emissions for the second and third fired cycle at 25°C ± 1°C engine and intake air temperature were investigated. Research work was conducted on a single cylinder SIDI engine with gasoline and E85 fuels, to study the effect on first fired cycle of engine startup. Piston configurations that included a compression ratio change (11 vs 15.5) and piston geometry change (flattop vs bowl) were tested, along with changes in intake cam timing (95,110,125) and fuel pressure (0.4 MPa vs 3 MPa). The goal was to replicate the engine speed, manifold pressure, fuel pressure and testing temperature from an engine startup trace for investigating the first fired cycle for the engine. Results showed bowl piston was able to enable lower equivalence ratio engine starts with gasoline fuel, while also showing lower IMEP at the same equivalence ratio compared to flat top piston. With E85, bowl piston showed reduced IMEP as compression ratio increased at the same equivalence ratio. A preference for constant intake valve timing across fuels seemed to indicate that flattop piston might be a good flex-fuel piston. Significant improvements were seen with higher CR bowl piston with high fuel pressure starts, but showed no improvement with low fuel pressures. Simulation work was conducted to analyze initial three cycles of engine startup in GT-POWER for the same set of hardware used in the experimentations. A steady state validated model was modified for startup conditions. The results of which allowed an understanding of the relative residual levels and IMEP at the test points in the cam phasing space. This allowed selecting additional test points that enable use of higher residual levels, eliminating those with smaller trapped mass incapable of producing required IMEP for proper engine turnover. The second phase of experimental testing results for 2nd and 3rd startup cycle revealed both E10 and E85 prefer the same SOI of 240°bTDC at second and third startup cycle for the flat top piston and high injection pressures. E85 fuel optimal cam timing for startup showed that it tolerates more residuals compared to E10 fuel. Higher internal residuals drives down the Ø requirement for both fuels up to their combustion stability limit, this is thought to be direct benefit to vaporization due to increased cycle start temperature. Benefits are shown for an advance IMOP and retarded EMOP strategy at engine startup. Overall the amount of residuals preferred by an engine for E10 fuel at startup is thought to be constant across engine speed, thus could enable easier selection of optimized cam positions across the startup speeds

Adiabatic Flip-Flops and Sequential Circuit Design using Novel Resettable Adiabatic Buffers

We propose novel resettable adiabatic buffers for five adiabatic logic families namely; Efficient Adiabatic Charge Recovery Logic (EACRL), Improved Efficient Charge Recovery Logic (IECRL), Positive Feedback Adiabatic Logic (PFAL), Complementary Pass-transistor Adiabatic Logic (CPAL) and Clocked Adiabatic Logic (CAL). We present the design of resettable flip-flops using the proposed buffers. The proposed flip-flops alleviate the problem of increased energy and area consumption incurred by the existing mux-based resettable flip-flops. We then design the 3-bit up-down counters and extended our comparison beyond energy dissipation using the above five adiabatic logic families. PFAL based sequential circuit designs gives the best performance trade-offs in terms of complexity, energy, speed and area compared to the other adiabatic designs

VHDL-based Modelling Approach for the Digital Simulation of 4-phase Adiabatic Logic Design

In comparison to conventional CMOS (non-adiabatic logic), the verification of the functionality and the low energy traits of adiabatic logic techniques are generally performed using transient simulations at the transistor level. However, as the size and complexity of the adiabatic system increases, the amount of time required to design and simulate also increases. Moreover, due to the complexity of synchronizing the power-clock phases, debugging of errors becomes difficult too thus, increasing the overall verification time. This paper proposes a VHSIC Hardware Descriptive Language (VHDL) based modelling approach for developing models representing the 4-phase adiabatic logic designs. Using the proposed approach, the functional errors can be detected and corrected at an early design stage so that when designing adiabatic circuits at the transistor level, the circuit performs correctly and the time for debugging the errors can substantially be reduced. The function defining the four periods of the trapezoidal AC power-clock is defined in a package which is followed by designing a library containing the behavioral VHDL models of adiabatic logic gates namely; AND/NAND, OR/NOR and XOR/XNOR. Finally, the model library is used to develop and verify the structural VHDL representation of the 4-phase 2-bit ring-counter and 3-bit up-down counter, as a design example that demonstrates the practicality of the proposed approach

Automated Malaria Parasite Detection in Thin Blood Films:- A Hybrid, Illumination and Colour Constancy Insensitive Morphological Approach

This paper illustrates the automated diagnosis of malaria parasite (Plasmodium species) in microscopic images of Giemsa stained thin blood films. The procedure adapts a morphological approach for blood cell identification and uses the image features such as intensity, histogram, relative size and geometry for further analysis. Two methods of object classification have been described for parasite detection; one based on relative size and morphology and the other based on intensity variation. An analytical study on both methods has been performed further to validate the accuracy of the methods

Multi-Stage Complex Notch Filtering for Interference Detection and Mitigation to Improve the Acquisition Performance of GPS

Continuous Wave Interferences (CWIs) can degrade the accuracy of a Global Positioning System (GPS) receiver and moreover it can completely deteriorate receiver’s normal operation. In this paper a low-cost anti-jamming system design is presented for the mitigation and detection of CWIs for GPS receivers. The anti-jamming system comprises of parameterizable Complex Adaptive Notch Filter (CANF) module which is able to detect and excise single or multiple CWIs. The CANF module is composed of a first, second and third order infinite-impulse response filter with an Auto-Regressive Moving Averager structure. The proposed CANF detects the existence of the CWI and estimates JNR level of incoming signal by using the statistical value of the adaptive parameter b0. The impact of the CANF module on the acquisition is analyzed. Moreover, a simple and innovative system level model is proposed which can utilize each CANF efficiently with threshold setting of JNR estimation within the adaptation block. Threshold setting parameters provide trade-off between effective excision of CWI, order of the filter and power consumption. This results in a parameterizable CANF module and provide effective solution for the mitigation of interferences with a high-power profile for GPS based applications