35 research outputs found

    Design, development, and fabrication of a electronic analog microminiaturized electronic analog signal to discrete time interval converter

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    The microminiaturization of an electronic analog signal to discrete time interval converter is presented. Discrete components and integrated circuits comprising the converter were assembled on a thin-film ceramic substrate containing nichrome resistors with gold interconnections. The finished assembly is enclosed in a flat package measuring 3.30 by 4.57 centimeters. The module can be used whenever conversion of analog to digital signals is required, in particular for the purpose of regulation by means of pulse modulation. In conjunction with a precision voltage reference, the module was applied to control the duty cycle of a switching regulator within a temperature range of -55 C to +125 C, and an input voltage range of 10V to 35V. The output-voltage variation was less than + or - 300 parts per million, i.e., less than + or - 3mV for a 10V output

    Dynamic Acoustic Control of Individual Optically Active Quantum Dot-like Emission Centers in Heterostructure Nanowires

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    We probe and control the optical properties of emission centers forming in radial het- erostructure GaAs-Al0.3Ga0.7As nanowires and show that these emitters, located in Al0.3Ga0.7As layers, can exhibit quantum-dot like characteristics. We employ a radio frequency surface acoustic wave to dynamically control their emission energy and occupancy state on a nanosec- ond timescale. In the spectral oscillations we identify unambiguous signatures arising from both the mechanical and electrical component of the surface acoustic wave. In addition, differ- ent emission lines of a single quantum dot exhibit pronounced anti-correlated intensity oscilla- tions during the acoustic cycle. These arise from a dynamically triggered carrier extraction out of the quantum dot to a continuum in the radial heterostructure. Using finite element modeling and Wentzel-Kramers-Brillouin theory we identify quantum tunneling as the underlying mech- anism. These simulation results quantitatively reproduce the observed switching and show that in our systems these quantum dots are spatially separated from the continuum by > 10.5 nm.Comment: This document is the unedited Author's version of a Submitted Work that was subsequently accepted for publication in Nano Letters, copyright \c{copyright} American Chemical Society after peer review. To access the final edited and published work see http://pubs.acs.org/doi/abs/10.1021/nl404043

    Epitaxially Defined FinFET: Variability Resistant and High-Performance Technology

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    FinFET technology is prone to suffer from line edge roughness (LER)-based V-T variation with scaling. It also lacks a simple implementation of multiple V-T technology needed for power management. To address these challenges, in this paper we present an epitaxially defined FinFET (EDFinFET) as an alternate to FinFET architecture for nodes 15 nm and beyond. We show by statistical simulations that EDFinFET reduces overall V-T variability with an 80% reduction in LER-based variability in comparison with FinFETs. We present dynamic threshold MOS (DTMOS) configuration of EDFinFET using the available body terminal to individual transistors. The DTMOS configuration reduces LER-based variability by 90% and overall variability by 59%. It also has excellent subthreshold slope (SS) and gives 43% higher I-ON compared with FinFETs. Meanwhile, EDFinFET shows poorer SS and lower I-ON than FinFET due to single gate control. However, it is capable of multiple V-T, which leads to circuit level power optimization

    Manufacturing Threats

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    International audienceThis chapter introduces an overview of the main reliability threats of last nanoscale generations of CMOS technology designs. In particular, the chapter focuses on sources of process variability and their impact on circuit design and their performances, but also on the runtime variability such as voltage fluctuations as well soft errors. Further to that we go over the transistor aging provoked by different wear-out physical effects such as Bias Temperature Instability (BTI), Hot Carrier Injection (HCI), Random Telegraph Noise (RTN) and Time-Dependent Dielectric Breakdown (TDDB)
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