Feasibility and economics of existing PWR transition to a higher power core using annular fuel

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Nuclear Science and Engineering, 2007.Includes bibliographical references (p. 135).The internally and externally cooled annular fuel is a new type of fuel for PWRs that enables an increase in core power density by 50% within the same or better safety margins as the traditional solid fuel. Each annular fuel assembly of the same side dimensions as the solid fuel has 160 annular fuel rods arranged in a 13x13 array. Even at the much higher power density, the fuel exhibits substantially lower temperatures and a MDNBR margin comparable to that of the traditional solid fuel at nominal (100%) power. The major motivation for such an up-rate is reduction of electricity generation cost. Indeed, the capital cost per kWh(e) of the construction is smaller than the standard construction of a new reactor with solid fuel. Elaborating on previous work, we study the economic payoff of such an up-rate of an existing PWR given the expected cost of equipment and also cost of money using different assumptions. Especially, the fate of the already bought solid fuel is investigated. It is demonstrated that the highest return on investment is obtained by gradually loading annular fuel in the reactor core such that right before shutting the reactor down for the up-rate construction, two batches in the core are of annular fuel. This option implies running a core with a mixture of both annular fuel and solid fuel assemblies. In order to prove the technical feasibility of such an option, the thermal-hydraulics of this mixed core is investigated and the Minimum Departure From Nucleate Boiling is found to be either unaffected or even improved by using a mixed core. Consequently, a neutronic model is developped to verify and validate the neutronic feasibility of the transition from solid fuel to annular fuel.(cont.) The overall conclusion of this work is that annular fuel is a very promising option for existing reactors to increase by 50% their power, because it enables such an uprate at very attractive return on investement. We show that, by a smart management of the transition, a return on investment of about 22 to 27 % can be achieved.by Julien Beccherle.S.M

Regional Initiatives and the Cost of Delaying Binding Climate Change Agreements

The Kyoto and Copenhagen Protocols on climate change mitigation postponed the specification of binding commitments to a future negotiation. This paper analyzes the strategic implications of delayed negotiations. While, as is well-understood, the incentive to free ride leads to excessive emissions prior to a binding agreement, the cost of delay is magnified by players' attempt to secure a favorable bargaining position in the future negotiation. A "brinkmanship", an "effort substitution", and a "raising rival's cost" effects all concur to generate high post-agreement emissions. The paper applies this general insight to the issuance of forward or bankable permits

Submission of the first fullscale prototype chip for upgraded ATLAS pixel detector at LHC, FE-I4A

A new ATLAS pixel chip FE-I4 is being developed for use in upgraded LHC luminosity environments, including the near-term Insertable B-Layer (IBL) upgrade. FE-I4 is designed in a 130 nm CMOS technology, presenting advantages in terms of radiation tolerance and digital logic density compared to the View the MathML source0.25μm CMOS technology used for the current ATLAS pixel IC, FE-I3. The FE-I4 architecture is based on an array of 80×336 pixels, each View the MathML source50×250μm2, consisting of analog and digital sections. In the summer 2010, a first full scale prototype FE-I4A was submitted for an engineering run. This IC features the full scale pixel array as well as the complex periphery of the future full-size FE-I4. The FE-I4A contains also various extra test features which should prove very useful for the chip characterization, but deviate from the needs for standard operation of the final FE-I4 for IBL. In this paper, focus will be brought to the various features implemented in the FE-I4A submission, while also underlining the main differences between the FE-I4A IC and the final FE-I4 as envisioned for IBL

The FE-I4 Pixel Readout Chip and the IBL Module

FE-I4 is the new ATLAS pixel readout chip for the upgraded ATLAS pixel detector. Designed in a CMOS 130 nm feature size process, the IC is able to withstand higher radiation levels compared to the present generation of ATLAS pixel Front-End FE-I3, and can also cope with higher hit rate. It is thus suitable for intermediate radii pixel detector layers in the High Luminosity LHC environment, but also for the inserted layer at 3.3 cm known as the 'Insertable B-Layer' project (IBL), at a shorter timescale. In this paper, an introduction to the FE-I4 will be given, focusing on test results from the first full size FE-I4A prototype which has been available since fall 2010. The IBL project will be introduced, with particular emphasis on the FE-I4-based module concept