11 research outputs found
A YBCO RF-SQUID magnetometer and its applications
An applicable RF-superconducting quantum interference detector (SQUID) magnetometer was made using a bulk sintered yttrium barium copper oxide (YBCO). The temperature range of the magnetometer is 77 to 300 K and the field range 0 to 0.1T. At 77 K, the equivalent flux noise of the SQUID is 5 x 10 to minus 4 power theta sub o/square root of Hz at the frequency range of 20 to 200 Hz. The experiments show that the SQUID noise at low-frequency end is mainly from 1/f noise. A coil test shows that the magnetic moment sensitivity delta m is 10 to the minus 6th power emu. The RF-SQUID is shielded in a YBCO cylinder with a shielding ability B sub in/B sub ex of about 10 to the minus 6th power when external dc magnetic field is about a few Oe. The magnetometer is successfully used in characterizing superconducting thin films
Novel Immunomodulatory Properties of Berbamine through Selective Down-Regulation of STAT4 and Action of IFN-γ in Experimental Autoimmune Encephalomyelitis
Anti-Inflammatory Properties and Regulatory Mechanism of a Novel Derivative of Artemisinin in Experimental Autoimmune Encephalomyelitis
An 8.8 ps RMS Resolution Time-To-Digital Converter Implemented in a 60 nm FPGA with Real-Time Temperature Correction
This paper presented a non-uniform multiphase (NUMP) time-to-digital converter (TDC) implemented in a field-programmable gate array (FPGA) with real-time automatic temperature compensation. NUMP-TDC is a novel, low-cost, high-performance TDC that has achieved an excellent performance in Altera Cyclone V FPGA. The root mean square (RMS) for the intrinsic timing resolution was 2.3 ps. However, the propagation delays in the delay chain of some FPGAs (for example, the Altera Cyclone 10 LP) vary significantly as the temperature changes. Thus, the timing performances of NUMP-TDCs implemented in those FPGAs are significantly impacted by temperature fluctuations. In this study, a simple method was developed to monitor variations in propagation delays using two registers deployed at both ends of the delay chain and compensate for changes in propagation delay using a look-up table (LUT). When the variations exceeded a certain threshold, the LUT for the delay correction was updated, and a bin-by-bin correction was launched. Using this correction approach, a resolution of 8.8 ps RMS over a wide temperature range (5 °C to 80 °C) had been achieved in a NUMP-TDC implemented in a Cyclone 10 LP FPGA