Direct Graphene Growth on Insulator

Fabrication of graphene devices is often hindered by incompatibility between the silicon technology and the methods of graphene growth. Exfoliation from graphite yields excellent films but is good mainly for research. Graphene grown on metal has a technological potential but requires mechanical transfer. Growth by SiC decomposition requires a temperature budget exceeding the technological limits. These issues could be circumvented by growing graphene directly on insulator, implying Van der Waals growth. During growth, the insulator acts as a support defining the growth plane. In the device, it insulates graphene from the Si substrate. We demonstrate planar growth of graphene on mica surface. This was achieved by molecular beam deposition above 600{\deg}C. High resolution Raman scans illustrate the effect of growth parameters and substrate topography on the film perfection. Ab initio calculations suggest a growth model. Data analysis highlights the competition between nucleation at surface steps and flat surface. As a proof of concept, we show the evidence of electric field effect in a transistor with a directly grown channel.Comment: 13 pages, 6 figure

Nucleation and growth of HfO2_2 layers on graphene by CVD

A seed layer-free growth of HfO$_2$ on commercially available CVD graphene from various suppliers is investigated. It is revealed that the samples of monolayer graphene transferred from Cu to SiO$_2$/Si substrates have different coverage with bi- and multi-layer graphene islands. We find that the distribution and number of such islands impact the nucleation and growth of HfO$_2$ by CVD. In particular, we show that the edges and surface of densely distributed bi-layer graphene islands provide good nucleation sites for conformal CVD HfO$_2$ layers. Dielectric constant of 16 is extracted from measurements on graphene- HfO$_2$-TiN capacitors.Comment: 4 pages, 6 figure

A Graphene-based Hot Electron Transistor

We experimentally demonstrate DC functionality of graphene-based hot electron transistors, which we call Graphene Base Transistors (GBT). The fabrication scheme is potentially compatible with silicon technology and can be carried out at the wafer scale with standard silicon technology. The state of the GBTs can be switched by a potential applied to the transistor base, which is made of graphene. Transfer characteristics of the GBTs show ON/OFF current ratios exceeding 50.000.Comment: 18 pages, 6 figure

Control of etch pit formation for epitaxial growth of graphene on germanium

Graphene epitaxy on germanium by chemical vapor deposition is a promising approach to integrate graphene into microelectronics, but the synthesis is still accompanied by several challenges such as the high process temperature, the reproducibility of growth, and the formation of etch pits during the process. We show that the substrate cleaning by preannealing in molecular hydrogen, which is crucial to successful and reproducible graphene growth, requires a high temperature and dose. During both substrate cleaning and graphene growth, etch pits can develop under certain conditions and disrupt the synthesis process. We explain the mechanisms how these etch pits may form by preferential evaporation of substrate, how substrate topography is related to the state of the cleaning process, and how etch pit formation during graphene growth can be controlled by choice of a sufficiently high precursor flow. Our study explains how graphene can be grown reliably on germanium at high temperature and thereby lays the foundation for further optimization of the growth process. © 2019 Author(s)

Oxide Precipitate Nucleation via Coherent Seed -Oxide Phases

Abstract not Available.</jats:p

The Prs₂O₃ /Si(001) Interface: a Mixed Si-Pr Oxide

AbstractWe studied the Pr2O3/Si(001) interface by a non-destructive depth profiling using synchrotron radiation and photo-electron spectroscopy (SR-PES) at the undulator beam line U49/2-PGM2 and ab initio calculations. Our results provide evidence that a chemical reactive interface exists consisting of a mixed Si-Pr oxide such as (Pr2O3)(SiO)x(SiO2)y. There is no formation of neither an interfacial SiO2 nor interfacial silicide: all Si-Pr bonds are oxidized and all SiO4 units dissolve in the Pr oxide. Under ultrahigh vacuum conditions, silicide formation is observed only when the film is heated above 800°C in vacuum. Interfacial silicates like (Pr2O3)(SiO)x(SiO2)y are promising high-k dielectric materials, e.g., because they represent incremental modification of SiO2 films by Pr ions, so that the interface characteristics can be similar to Si-SiO2 interface properties. The Pr silicate system formed in a natural way at the interface between Si(001) and Pr2O3 offers an increased flexibility towards integration of Pr2O3 into future CMOS technologies.</jats:p