Higgs bosons of a supersymmetric E6E_6 model at the Large Hadron Collider

It is found that CP symmetry may be explicitly broken in the Higgs sector of a supersymmetric $E_6$ model with two extra neutral gauge bosons at the one-loop level. The phenomenology of the model, the Higgs sector in particular, is studied for a reasonable parameter space of the model, in the presence of explicit CP violation at the one-loop level. At least one of the neutral Higgs bosons of the model might be produced via the $WW$ fusion process at the Large Hadron Collider.Comment: 23 pages, 5 figures, JHE

Surface crack growth in fiber composites

The results of an experimental study of damage extension and failure in glass and graphite/epoxy laminates containing partially through-thickness surface cracks are presented. The laminates studied are divided between those containing four plies, 90/0/0/90, 15/-15/-15/15, and 45/-45/-45/45, and those containing 12-16 plies of the general configurations 0/90, + or - 45, and 0/+ or - 60. Most of the results are for surface cracks of various lengths and several depths. Stable damage extension in laminates containing surface cracks is predominantly delamination between plies, and tends to be much more extensive prior to failure than is the case with through-thickness cracks, resulting in approximately notch-insensitive behavior in most cases. A greater tendency for notch-sensitive behavior is found for 0/90 graphite/epoxy laminates for which stable damage extension is more limited. The rate of damage extension with increasing applied stress depends upon the composite system and ply configuration as well as the crack length and depth. An approximate semiempirical method is presented for estimating the growth rate of large damage-regions

Theory of plasmon-enhanced high-harmonic generation in the vicinity of metal nanostructures in noble gases

We present a semiclassical model for plasmon-enhanced high-harmonic generation (HHG) in the vicinity of metal nanostructures. We show that both the inhomogeneity of the enhanced local fields and electron absorption by the metal surface play an important role in the HHG process and lead to the generation of even harmonics and to a significantly increased cutoff. For the examples of silver-coated nanocones and bowtie antennas we predict that the required intensity reduces by up to three orders of magnitudes and the HHG cutoff increases by more than a factor of two. The study of the enhanced high-harmonic generation is connected with a finite-element simulation of the electric field enhancement due to the excitation of the plasmonic modes.Comment: 4 figure

Characterization Of Thermal Stresses And Plasticity In Through-Silicon Via Structures For Three-Dimensional Integration

Through-silicon via (TSV) is a critical element connecting stacked dies in three-dimensional (3D) integration. The mismatch of thermal expansion coefficients between the Cu via and Si can generate significant stresses in the TSV structure to cause reliability problems. In this study, the thermal stress in the TSV structure was measured by the wafer curvature method and its unique stress characteristics were compared to that of a Cu thin film structure. The thermo-mechanical characteristics of the Cu TSV structure were correlated to microstructure evolution during thermal cycling and the local plasticity in Cu in a triaxial stress state. These findings were confirmed by microstructure analysis of the Cu vias and finite element analysis (FEA) of the stress characteristics. In addition, the local plasticity and deformation in and around individual TSVs were measured by synchrotron x-ray microdiffraction to supplement the wafer curvature measurements. The importance and implication of the local plasticity and residual stress on TSV reliabilities are discussed for TSV extrusion and device keep-out zone (KOZ).Microelectronics Research Cente

Stress-Induced Delamination Of Through Silicon Via Structures

Continuous scaling of on-chip wiring structures has brought significant challenges for materials and processes beyond the 32 nm technology node in microelectronics. Recently three-dimensional (3-D) integration with through-silicon-vias (TSVs) has emerged as an effective solution to meet the future interconnect requirement. Thermo-mechanical reliability is a key concern for the development of TSV structures used in die stacking as 3-D interconnects. This paper examines the effect of thermal stresses on interfacial reliability of TSV structures. First, the three-dimensional distribution of the thermal stress near the TSV and the wafer surface is analyzed. Using a linear superposition method, a semi-analytic solution is developed for a simplified structure consisting of a single TSV embedded in a silicon (Si) wafer. The solution is verified for relatively thick wafers by comparing to numerical results obtained by finite element analysis (FEA). Results from the stress analysis suggest interfacial delamination as a potential failure mechanism for the TSV structure. Analytical solutions for various TSV designs are then obtained for the steady-state energy release rate as an upper bound for the interfacial fracture driving force, while the effect of crack length is evaluated numerically by FEA. Based on these results, the effects of TSV designs and via material properties on the interfacial reliability are elucidated. Finally, potential failure mechanisms for TSV pop-up due to interfacial fracture are discussed.Aerospace Engineerin

Thermomechanical Characterization And Modeling For TSV Structures

Continual scaling of devices and on-chip wiring has brought significant challenges for materials and processes beyond the 32-nm technology node in microelectronics. Recently, three-dimensional (3-D) integration with through-silicon vias (TSVs) has emerged as an effective solution to meet the future technology requirements. Among others, thermo-mechanical reliability is a key concern for the development of TSV structures used in die stacking as 3-D interconnects. This paper presents experimental measurements of the thermal stresses in TSV structures and analyses of interfacial reliability. The micro-Raman measurements were made to characterize the local distribution of the near-surface stresses in Si around TSVs. On the other hand, the precision wafer curvature technique was employed to measure the average stress and deformation in the TSV structures subject to thermal cycling. To understand the elastic and plastic behavior of TSVs, the microstructural evolution of the Cu vias was analyzed using focused ion beam (FIB) and electron backscattering diffraction (EBSD) techniques. Furthermore, the impact of thermal stresses on interfacial reliability of TSV structures was investigated by a shear-lag cohesive zone model that predicts the critical temperatures and critical via diameters.Microelectronics Research Cente

Thermomechanical Reliability Challenges For 3D Interconnects With Through-Silicon Vias

Continual scaling of on-chip wiring structures has brought significant challenges for materials and processes beyond the 32 nm technology node in microelectronics. Recently threedimensional (3-D) integration with through-silicon-vias (TSVs) has emerged as an effective solution to meet the future interconnect requirement. Among others, thermo-mechanical reliability is a key concern for the development of TSV structures used in die stacking as 3-D interconnects. This paper examines the effects of thermally induced stresses on interfacial reliability of TSV structures. First, three-dimensional distribution of the thermal stress near the TSV and the wafer surface is analyzed. Using a linear superposition method, a semi-analytic solution is developed for a simplified structure consisting of a single TSV embedded in a silicon (Si) wafer. The solution is verified for relatively thick wafers by comparing to numerical results From finite element analysis (FEA). The stress analysis suggests interfacial delamination as a potential failure mechanism for the TSV structure. An analytical solution is then obtained for the steady-state energy release rate as the upper bound for the interfacial fracture driving force, while the effect of crack length is evaluated numerically by FEA. With these results, the effects of the TSV dimensions (e.g., via diameter and wafer thickness) on the interfacial reliability are elucidated. Furthermore, the effects of via material properties are discussed.Aerospace Engineerin

Stochastics theory of log-periodic patterns

We introduce an analytical model based on birth-death clustering processes to help understanding the empirical log-periodic corrections to power-law scaling and the finite-time singularity as reported in several domains including rupture, earthquakes, world population and financial systems. In our stochastics theory log-periodicities are a consequence of transient clusters induced by an entropy-like term that may reflect the amount of cooperative information carried by the state of a large system of different species. The clustering completion rates for the system are assumed to be given by a simple linear death process. The singularity at t_{o} is derived in terms of birth-death clustering coefficients.Comment: LaTeX, 1 ps figure - To appear J. Phys. A: Math & Ge