Disturbed oscillatory brain dynamics in subcortical ischemic vascular dementia

<p>Abstract</p> <p>Background</p> <p>White matter hyperintensities (WMH) can lead to dementia but the underlying physiological mechanisms are unclear. We compared relative oscillatory power from electroencephalographic studies (EEGs) of 17 patients with subcortical ischemic vascular dementia, based on extensive white matter hyperintensities (SIVD-WMH) with 17 controls to investigate physiological changes underlying this diagnosis.</p> <p>Results</p> <p>Differences between the groups were large, with a decrease of relative power of fast activity in patients (alpha power 0.25 ± 0.12 versus 0.38 ± 0.13, p = 0.01; beta power 0.08 ± 0.04 versus 0.19 ± 0.07; p<0.001) and an increase in relative powers of slow activity in patients (theta power 0.32 ± 0.11 versus 0.14 ± 0.09; p<0.001 and delta power 0.31 ± 0.14 versus 0.23 ± 0.09; p<0.05). Lower relative beta power was related to worse cognitive performance in a linear regression analysis (standardized beta = 0.67, p<0.01).</p> <p>Conclusions</p> <p>This pattern of disturbance in oscillatory brain activity indicate loss of connections between neurons, providing a first step in the understanding of cognitive dysfunction in SIVD-WMH.</p

Título: Historia ecclesiastica

Marca tip. en portSign.: a-l\p8\s, m\p4\s, A-Z\p8\s, 2A-2Q\p8\sPort. con grab. calcGrab. calc. en p.

A CMOS Semi-Custom Chip for Mixed Signal Designs

Abstract—This paper describes a redesign of a Sea-of-Gates chip that was developed at Delft University of Technology more than 10 years ago, and that has extensively been used at laboratory courses since then. The main difference with the original chip is that the new one has several analog cells like OpAmps, comparators, and resistor banks in addition to a large core of Sea-of-Gates transistors. While the Sea-of-Gates transistors are mainly used to implement the digital parts of the design, the analog cells can efficiently be used to create analog subsystems like amplifiers and digital-to-analog converters. Similar as to the original Sea-of-Gates chip, the designer uses the OCEAN/Nelsis design system to generate two metallization layers to implement the design. Keywords — mixed-signal, semi-custom, IC, Sea-of-Gates, analog cell array

The Transparency of the European Central Bank in the Single Supervisory Mechanism

Not least due to the relatively short period of existence of the Single Supervisory Mechanism (SSM), the transparency of the European Central Bank (ECB) in the SSM has not attracted significant attention from legal scholarship. This contribution seeks to close this gap to some extent by mapping out the ECB"s transparency regime within the SSM and illustrating, where relevant, the notable differences not only with the transparency regime applicable in the area of monetary policy, but also the general transparency regime of the EU

Finding the core: Network structure in interbank markets

This paper investigates the network structure of interbank markets, which has proved to be important for financial stability during the crisis. First, we describe and map the interbank network in the Netherlands, an exception in the literature because of its small and open banking environment. Secondly, we follow recent analyses of interbank markets of Germany and Italy in estimating the Core Periphery model, using data for the Netherlands instead. We find a significant Core Periphery structure and discuss model selection. The overall analysis opens up new opportunities for systemic risk assessments of the interbank market, especially as more granular data is becoming available for the eurozone