Comparison of electrical CD measurements and cross-section lattice-plane counts of sub-micrometer features replicated in Silicon-on-Insulator materials

Electrical test structures of the type known as cross-bridge resistors have been patterned in (100) epitaxial silicon material that was grown on Bonded and Etched-Back Silicon-on-Insulator (BESOI) substrates. The CDs (Critical Dimensions) of a selection of their reference segments have been measured electrically, by SEM (Scanning-Electron Microscopy) cross-section imaging, and by lattice-plane counting. The lattice-plane counting is performed on phase-contrast images made by High-Resolution Transmission-Electron Microscopy (HRTEM). The reference-segment features were aligned with <110> directions in the BESOI surface material. They were defined by a silicon micromachining process which results in their sidewalls being atomically-planar and smooth and inclined at 54.737{degree} to the surface (100) plane of the substrate. This (100) implementation may usefully complement the attributes of the previously-reported vertical-sidewall one for selected reference-material applications. The SEM, HRTEM, and electrical CD (ECD) linewidth measurements that are made on BESOI features of various drawn dimensions on the same substrate is being investigated to determine the feasibility of a CD traceability path that combines the low cost, robustness, and repeatability of the ECD technique and the absolute measurement of the HRTEM lattice-plane counting technique. Other novel aspects of the (100) SOI implementation that are reported here are the ECD test-structure architecture and the making of HRTEM lattice-plane counts from both cross-sectional, as well as top-down, imaging of the reference features. This paper describes the design details and the fabrication of the cross-bridge resistor test structure. The long-term goal is to develop a technique for the determination of the absolute dimensions of the trapezoidal cross-sections of the cross-bridge resistors reference segments, as a prelude to making them available for dimensional reference applications

Flux-Induced Vortex in Mesoscopic Superconducting Loops

We predict the existence of a quantum vortex for an unusual situation. We study the order parameter in doubly connected superconducting samples embedded in a uniform magnetic field. For samples with perfect cylindrical symmetry, the order parameter has been known for long and no vortices are present in the linear regime. However, if the sample is not symmetric, there exist ranges of the field for which the order parameter vanishes along a line, parallel to the field. In many respects, the behavior of this line is qualitatively different from that of the vortices encountered in type II superconductivity. For samples with mirror symmetry, this flux-induced vortex appears at the thin side for small fluxes and at the opposite side for large fluxes. We propose direct and indirect experimental methods which could test our predictions.Comment: 6 pages, Latex, 4 figs., uses RevTex, extended to situations far from cylindrical symmetr

Redox-Active Molecular Nanowire Flash Memory for High-Endurance and High-Density Nonvolatile Memory Applications

In this work, high-performance top-gated nanowire molecular flash memory has been fabricated with redox-active molecules. Different molecules with one and two redox centers have been tested. The flash memory has clean solid/molecule and dielectric interfaces, due to the pristine molecular self-assembly and the nanowire device self-alignment fabrication process. The memory cells exhibit discrete charged states at small gate voltages. Such multi-bit memory in one cell is favorable for high-density storage. These memory devices exhibit fast speed, low power, long memory retention, and exceptionally good endurance (>10⁹ cycles). The excellent characteristics are derived from the intrinsic charge-storage properties of the protected redox-active molecules. Such multi-bit molecular flash memory is very attractive for high-endurance and high-density on-chip memory applications in future portable electronics