A VLSI architecture of a binary updown counter

A pipeline binary updown counter with many bits is developed which can be used in a variety of applications. One such application includes the design of a digital correlator for very long baseline interferometry (VLBI). The advantage of the presently conceived approach over the previous techniques is that the number of logic operations involved in the design of the binary updown counter can be reduced substantially. The architecture design using these methods is regular, simple, expandable and, therefore, naturally suitable for VLSI implementation

A VLSI single chip (255,223) Reed-Solomon encoder with interleaver

A single-chip implementation of a Reed-Solomon encoder with interleaving capability is described. The code used was adapted by the CCSDS (Consulative Committee on Space Data Systems). It forms the outer code of the NASA standard concatenated coding system which includes a convolutional inner code of rate 1/2 and constraint length 7. The architecture, leading to this single VLSI chip design, makes use of a bit-serial finite field multiplication algorithm due to E.R. Berlekamp

A simplified procedure for correcting both errors and erasures of a Reed-Solomon code using the Euclidean algorithm

It is well known that the Euclidean algorithm or its equivalent, continued fractions, can be used to find the error locator polynomial and the error evaluator polynomial in Berlekamp's key equation needed to decode a Reed-Solomon (RS) code. A simplified procedure is developed and proved to correct erasures as well as errors by replacing the initial condition of the Euclidean algorithm by the erasure locator polynomial and the Forney syndrome polynomial. By this means, the errata locator polynomial and the errata evaluator polynomial can be obtained, simultaneously and simply, by the Euclidean algorithm only. With this improved technique the complexity of time domain RS decoders for correcting both errors and erasures is reduced substantially from previous approaches. As a consequence, decoders for correcting both errors and erasures of RS codes can be made more modular, regular, simple, and naturally suitable for both VLSI and software implementation. An example illustrating this modified decoding procedure is given for a (15, 9) RS code

Decoding of 1/2-rate (24,12) Golay codes

A decoding method for a (23,12) Golay code is extended to the important 1/2-rate (24,12) Golay code so that three errors can be corrected and four errors can be detected. It is shown that the method can be extended to any decoding method which can correct three errors in the (23,12) Golay code

The VLSI design of a single chip Reed-Solomon encoder

A design for a single chip implementation of a Reed-Solomon encoder is presented. The architecture that leads to this single VLSI chip design makes use of a bit serial finite field multiplication algorithm

Boundary effect of a partition in a quantum well

The paper wishes to demonstrate that, in quantum systems with boundaries, different boundary conditions can lead to remarkably different physical behaviour. Our seemingly innocent setting is a one dimensional potential well that is divided into two halves by a thin separating wall. The two half wells are populated by the same type and number of particles and are kept at the same temperature. The only difference is in the boundary condition imposed at the two sides of the separating wall, which is the Dirichlet condition from the left and the Neumann condition from the right. The resulting different energy spectra cause a difference in the quantum statistically emerging pressure on the two sides. The net force acting on the separating wall proves to be nonzero at any temperature and, after a weak decrease in the low temperature domain, to increase and diverge with a square-root-of-temperature asymptotics for high temperatures. These observations hold for both bosonic and fermionic type particles, but with quantitative differences. We work out several analytic approximations to explain these differences and the various aspects of the found unexpectedly complex picture.Comment: LaTeX (with iopart.cls, iopart10.clo and iopart12.clo), 28 pages, 17 figure

A VLSI pipeline design of a fast prime factor DFT on a finite field

A conventional prime factor discrete Fourier transform (DFT) algorithm is used to realize a discrete Fourier-like transform on the finite field, GF(q sub n). A pipeline structure is used to implement this prime factor DFT over GF(q sub n). This algorithm is developed to compute cyclic convolutions of complex numbers and to decode Reed-Solomon codes. Such a pipeline fast prime factor DFT algorithm over GF(q sub n) is regular, simple, expandable, and naturally suitable for VLSI implementation. An example illustrating the pipeline aspect of a 30-point transform over GF(q sub n) is presented

Long-Time Dynamics of Variable Coefficient mKdV Solitary Waves

We study the Korteweg-de Vries-type equation dt u=-dx(dx^2 u+f(u)-B(t,x)u), where B is a small and bounded, slowly varying function and f is a nonlinearity. Many variable coefficient KdV-type equations can be rescaled into this equation. We study the long time behaviour of solutions with initial conditions close to a stable, B=0 solitary wave. We prove that for long time intervals, such solutions have the form of the solitary wave, whose centre and scale evolve according to a certain dynamical law involving the function B(t,x), plus an H^1-small fluctuation.Comment: 19 page