Cross-Coupled Charge Pump Synthesis Based on Full Transistor-Level

This paper presents utility for the design of the cross-coupled charge pump, which is used for supplying peripherals with low current consumption on the chip, as the EEPROM or FLASH memories. The article summarizes the knowledge in the field of the theoretical and practical analysis of the cross-coupled charge pump (design relationships and their connection with the pump parameters, as the threshold voltage, power supply voltage, clock signal frequency, etc.) that are applicated in the design algorithm. Optimal MOSFETs sizes (W, L) were find based on the construct of the time response characteristics of the pump sub-block and finding of the maximal voltage increase in the active interval of the clock signal and minimizing of the pump losses, as the switch reverse current, inverter cross current, etc. Synthesis process includes the design of the pump functional blocks with dominant real properties, which are described based on BSIM equations for long channel MOSFET. The pump stage complex model is applicated for estimation of the number of pump stages via state-space model description and using of the interpolation polynomial functions in the algorithm. It involves the construction of the time response characteristic due to the state variables and prediction of the number of the pump stages for the next cycle based on the previous data. Optimization of the pump area is based on the minimizing of the main capacitor in each of the pump stages (number of the pump stages must be increased to obtain the desired output voltage value.) Access is designed to stress the maximum pump voltage efficiency. The whole procedure is summarized in the practical example, in which the solution is shown both in terms of maximal voltage efficiency and the optimal pump area on a chip with respect to the clock signal frequency. Added functions of the design environment are explained, inclusive of the designed pump netlist generating for professional design environment Mentor Graphics including the real models of components that are available in library MGC Design Kit. The procedure gives designer credible results without long timeconsuming optimization process. In addition, the complex model allows the inclusion effects of higher-levels

Optimization of Dynamic Range of Cascade Filter Realization

This paper deals with a dynamic range optimization procedure for active filters based on the cascade realization. Dynamic characteristics of the cascade filter depend on many factors, mainly on pole-zero pairing, section ordering and gain assignment. Just the procedure for an optimal gain assignment for particular biquadratic sections is discussed in this paper. The input parameters of the procedure are parameters of particular biquads i.e. pole frequency ω0, quality factor Q, eventually zero frequency ωn for elliptic section and the transfer function type of the section. The gain is distributed so that output signal limitation of particular biquads occurs for the same level of the filter input signal. The procedure is versatile - can be used for analog as well as for digital filters with the cascade structure. The presented algorithm is fully universal (does not suppose any simplification). It has been used in Syntfil package for the filter design in the mathematical program Maple

Implementation of a Two-Channel Maximally Decimated Filter Bank using Switched Capacitor Circuits

The aim of this paper is to describe the implementation of a two-channel filter bank (FB) using the switched capacitor (SC) technique considering real properties of operational amplifiers (OpAmps). The design procedure is presented and key recommendations for the implementation are given. The implementation procedure describes the design of two-channel filter bank using an IIR Cauer filter, conversion of IIR into the SC filters and the final implementation of the SC filters. The whole design and an SC circuit implementation is performed by a PraCAn package in Maple. To verify the whole filter bank, resulting real property circuit structures are completely simulated by WinSpice and ELDO simulators. The results confirm that perfect reconstruction conditions can be almost accepted for the filter bank implemented by the SC circuits. The phase response of the SC filter bank is not strictly linear due to the IIR filters. However, the final ripple of a magnitude frequency response in the passband is almost constant, app. 0.5 dB for a real circuit analysis

Switched-Capacitor Filter Optimization with Respect to Switch On-State Resistance and Features of Real Operational Amplifiers

The optimization of a switched-capacitor filter, which implements a biquadratic section, is described in this paper. The aim of the optimization is to obtain a required magnitude frequency response of the filter. The optimization takes into account both one of the features of real switches - their on-state resistance, and the features of real operational amplifiers - finite voltage gain and finite unity-gain bandwidth. An optimal dynamic range is to be achieved as well. The differential evolution - a kind of evolutionary algorithms - is employed for the optimization. The filter is designed by the usual way with ideal switches and ideal operational amplifiers at first. The analysis of this filter with real switches and real operational amplifiers proves that there is a significant difference between its magnitude frequency response and the one with ideal components. Hence, the optimization is applied for finding component values so that the magnitude frequency response is as similar to the one with ideal components as possible. As for other main real features of operational amplifiers - input and output resistance - it is shown that their effect is small

High Voltage Coil Current Sensor for DC-DC Converters Employing DDCC

Current sensor is an integral part of every switching converter. It is used for over-current protection, regulation and in case of multiphase converters for balancing. A new high voltage current sensor for coil-based current sensing in DC-DC converters is presented. The sensor employs DDCC with high voltage input stage and gain trimming. The circuit has been simulated and implemented in 0.35 um BCD technology as part of a multiphase DC-DC converter where its function has been verified. The circuit is able to sustain common mode voltage on the input up to 40 V, it occupies 0.387*0.345 mm2 and consumes 3.2 mW typically

Design of Dual Bandpass and Bandreject LC Ladder Filters

This paper deals with the design of two-passband bandpass and two-stopband bandreject LC ladder filters. The design method is based on the special dual frequency transformation that transforms normalized lowpass to either bandpass with two passbands or to bandreject with two stopbands that are specified by four cutoff frequencies. The paper shows analytical solution relating these four cutoff frequencies to parameters of dual frequency transformation. It enables a direct computation of dual band LC filter elements from a normalized lowpass filter by means of simple relations. These relations have been implemented in the mathematical program Maple (TM) as new user functions. They are supposed to be used as an enhancement of Syntfil package which is intended for analog filter design in program Maple. Specific application is shown on an example of the two-passband bandpass LC filter design

Developing Model-Based Design Evaluation for Pipelined A/D Converters

This paper deals with a prospective approach of modeling, design evaluation and error determination applied to pipelined A/D converter architecture. In contrast with conventional ADC modeling algorithms targeted to extract the maximum ADC non-linearity error, the innovative approach presented allows to decompose magnitudes of individual error sources from a measured or simulated response of an ADC device. Design Evaluation methodology was successfully applied to Nyquist rate cyclic converters in our works [13]. Now, we extend its principles to pipelined architecture. This qualitative decomposition can significantly contribute to the ADC calibration procedure performed on the production line in term of integral and differential nonlinearity. This is backgrounded by the fact that the knowledge of ADC performance contributors provided by the proposed method helps to adjust the values of on-chip converter components so as to equalize (and possibly minimize) the total non-linearity error. In this paper, the design evaluation procedure is demonstrated on a system design example of pipelined A/D converter. Significant simulation results of each stage of the design evaluation process are given, starting from the INL performance extraction proceeded in a powerful Virtual Testing Environment implemented in Maple™ software and finishing by an error source simulation, modeling of pipelined ADC structure and determination of error source contribution, suitable for a generic process flow

Ways to Optimize Analogue Switched Circuits

This paper describes how analogue switched circuits (switched-capacitor and switched-current circuits) can be optimized by means of a personal computer. The optimization of this kind of circuits is not so common and their analysis is more difficult in comparison with continuously working circuits. Firstly, the nonidealities occurring in these circuits whose effect on their characteristics should be optimized are discussed. Then a few ways to analyze analogue switched circuits are shown. From all optimization algorithms applicable for this kind of optimization, two ones that seem to be the most promising are proposed. The differential evolution (one of evolutionary algorithms) combined with the simplex method was found to be most appropriate from these two ones. Two types of programs are required for the optimization of these circuits: a program for implementing calculations of the used optimization algorithm and a program for the analysis of the optimized circuit. Several suitable computer programs from both of the groups together with their proper settings according to authors’ experience are proposed. At the end of the paper, an example of a switched-current circuit optimization documenting the previous description is presented

Analysis and Synthesis of the Digital Structures by the Matrix Method

This paper presents a general matrix algorithm for analysis of digital filters. The method proposed in this paper allows not only the analysis of the digital filters, but also the construction of new structures of the canonic or non-canonic digital filter. Equivalent filters of different structures can be found according to various matrix expansions. The structures can be calculated even from transfer function or from state-space matrices and with the additional advantage of requiring minimum number of shifting elements. Traditional research methods are not able to construct the system with a minimum of the shifting operations

Doppler shift satellite navigation - NAVSAT-TRANSIT and adherents

Short article dissertates about Satellite navigation systems based on Doppler shift. Discussed are advantages and disadvantages of such systems especially in connection with aviation. In last part are mentioned nowadays satellite navigation systems based on Doppler shift effect