Overview of Swallow --- A Scalable 480-core System for Investigating the Performance and Energy Efficiency of Many-core Applications and Operating Systems

We present Swallow, a scalable many-core architecture, with a current configuration of 480 x 32-bit processors. Swallow is an open-source architecture, designed from the ground up to deliver scalable increases in usable computational power to allow experimentation with many-core applications and the operating systems that support them. Scalability is enabled by the creation of a tile-able system with a low-latency interconnect, featuring an attractive communication-to-computation ratio and the use of a distributed memory configuration. We analyse the energy and computational and communication performances of Swallow. The system provides 240GIPS with each core consuming 71--193mW, dependent on workload. Power consumption per instruction is lower than almost all systems of comparable scale. We also show how the use of a distributed operating system (nOS) allows the easy creation of scalable software to exploit Swallow's potential. Finally, we show two use case studies: modelling neurons and the overlay of shared memory on a distributed memory system.Comment: An open source release of the Swallow system design and code will follow and references to these will be added at a later dat

Scalable data abstractions for distributed parallel computations

The ability to express a program as a hierarchical composition of parts is an essential tool in managing the complexity of software and a key abstraction this provides is to separate the representation of data from the computation. Many current parallel programming models use a shared memory model to provide data abstraction but this doesn't scale well with large numbers of cores due to non-determinism and access latency. This paper proposes a simple programming model that allows scalable parallel programs to be expressed with distributed representations of data and it provides the programmer with the flexibility to employ shared or distributed styles of data-parallelism where applicable. It is capable of an efficient implementation, and with the provision of a small set of primitive capabilities in the hardware, it can be compiled to operate directly on the hardware, in the same way stack-based allocation operates for subroutines in sequential machines

Swallow:Building an Energy-Transparent Many-Core Embedded Real-Time System

Swallow is a many-core platform of interconnected embedded real time processors with time-deterministic execution and a cache-less memory subsystem. Its largest current configuration is 480 × 32-bit processors. It is open-source, designed from the ground up to allow the exploration of flexibility, scalability and energy efficiency in large systems of embedded processors. Further, it enables the behavior of various structures of parallel programs to be explored. It is a proof of concept and design example for other potential systems of this kind. We present the energy transparency features and proportional energy scaling of the system that allows it to be expanded beyond hundreds of cores. We discuss the design choices, construction and novel network implementation of Swallow. Currently, the system provides up to 240 GIPS, with each core consuming 71–193 mW, dependent on workload. Its power per instruction is lower than almost all systems of comparable scale. We discuss the challenges associated with efficiently utilizing this system, particularly communication/computation ratios, and give recommendations for future systems and their software

FANCD2 expression affects platinum response and further characteristics of high grade serous ovarian cancer in cells with different genetic backgrounds

High-grade serous ovarian cancer (HGSOC) is the most prevalent subtype of ovarian cancer and demonstrates 5-year survival of just 40%. One of the major causes of mortality is the development of tumour resistance to platinum-based chemotherapy, which can be modulated by dysregulation of DNA damage repair pathways. We therefore investigated the contribution of the DNA interstrand crosslink repair protein FANCD2 to chemosensitivity in HGSOC. Increased FANCD2 protein expression was observed in some cell line models of platinum resistant HGSOC compared with paired platinum sensitive models. Knockdown of FANCD2 in some cell lines, including the platinum resistant PEO4, led to increased carboplatin sensitivity. Investigation into mechanisms of FANCD2 regulation showed that increased FANCD2 expression in platinum resistant cells coincides with increased expression of mTOR. Treatment with mTOR inhibitors resulted in FANCD2 depletion, suggesting that mTOR can mediate platinum sensitivity via regulation of FANCD2. Tumours from a cohort of HGSOC patients showed varied nuclear and cytoplasmic FANCD2 expression, however this was not significantly associated with clinical characteristics. Knockout of FANCD2 was associated with increased cell migration, which may represent a non-canonical function of cytoplasmic FANCD2. We conclude that upregulation of FANCD2, possibly mediated by mTOR, is a potential mechanism of chemoresistance in HGSOC and modulation of FANCD2 expression can influence platinum sensitivity and other tumour cell characteristics

RFWD3 modulates response to platinum chemotherapy and promotes cancer associated phenotypes in high grade serous ovarian cancer

Background: DNA damage repair is frequently dysregulated in high grade serous ovarian cancer (HGSOC), which can lead to changes in chemosensitivity and other phenotypic differences in tumours. RFWD3, a key component of multiple DNA repair and maintenance pathways, was investigated to characterise its impact in HGSOC.Methods: RFWD3 expression and association with clinical features was assessed using in silico analysis in the TCGA HGSOC dataset, and in a further cohort of HGSOC tumours stained for RFWD3 using immunohistochemistry. RFWD3 expression was modulated in cell lines using siRNA and CRISPR/cas9 gene editing, and cells were characterised using cytotoxicity and proliferation assays, flow cytometry, and live cell microscopy. Results: Expression of RFWD3 RNA and protein varied in HGSOCs. In cell lines, reduction of RFWD3 expression led to increased sensitivity to interstrand crosslinking (ICL) inducing agents mitomycin C and carboplatin. RFWD3 also demonstrated further functionality outside its role in DNA damage repair, with RFWD3 deficient cells displaying cell cycle dysregulation, reduced cellular proliferation and reduced migration. In tumours, low RFWD3 expression was associated with increased tumour mutational burden, and complete response to platinum chemotherapy. Conclusions: RFWD3 expression varies in HGSOCs, which can lead to functional effects at both the cellular and tumour levels.<br/

Design of 370-ps Delay Floating-Voltage Level Shifters With 30-V/ns Power Supply Slew Tolerance

A new design method for producing high-performance and power-rail slew-tolerant floating-voltage level shifters is presented, offering increased speed, reduced power consumption, and smaller layout area compared with previous designs. The method uses an energy-saving pulse-triggered input, a high-bandwidth current mirror, and a simple full latch composed of two inverters. A number of optimizations are explored in detail, resulting in a presented design with a dVdd slew immunity of 30 V/ns, and near-zero static power dissipation in a 180-nm technology. Experimental results show a delay of below 370 ps for a level-shift range of 8-20 V. Postlayout simulation puts the energy consumption at 2.6 pJ/bit at 4 V and 7.2 pJ/bit at 20 V, with near symmetric rise and fall delays

A 6.7-GHz Active Gate Driver for GaN FETs to Combat Overshoot, Ringing, and EMI

Active gate driving has been demonstrated to beneficially shape switching waveforms in Si-and SiC-based power converters. For faster GaN power devices with sub-10-ns switching transients, however, reported variable gate driving has so far been limited to altering a single drive parameter once per switching event, either during or outside of the transient. This paper demonstrates a gate driver with a timing resolution and range of output resistance levels that surpass those of existing gate drivers or arbitrary waveform generators. It is shown to permit active gate driving with a bandwidth that is high enough to shape a GaN switching during the transient. The programmable gate driver has integrated high-speed memory, control logic, and multiple parallel output stages. During switching transients, the gate driver can activate a near-arbitrary sequence of pull-up or pull-down output resistances between 0.12 and 64 A hybrid of clocked and asynchronous control logic with 150-ps delay elements achieves an effective resistance update rate of 6.7 GHz during switching events. This active gate driver is evaluated in a 1-MHz bridge-leg converter using EPC2015 GaN FETs. The results show that aggressive manipulation of the gate-drive resistance at sub-nanosecond resolutions can profile gate waveforms of the GaN FET, thereby beneficially shaping the switch-node voltage waveform in the power circuit. Examples of open-loop active gate driving are demonstrated that maintain the low switching loss of constant-strength gate driving, while reducing overshoot, oscillation, and EMI-generating high-frequency spectral content