High frequency winding design for planar switch mode transformers

Switch mode power supplies as a mass produced article leave room for optimization especially at the voluminous magnetic components. Hereby planar component designs can reduce the overall height of the power supply and give it a more compact design. Since cores are available in standard sizes the optimal winding layout has to be found. Due to increased parasitic capacitance interleaving is not a good option to reduce losses in the windings at high frequency resonant power supplies. This article presents and evaluates different winding designs for resonant switch mode transformers operating in power supplies with frequencies larger than 500kHz. This article shows that the revolved parallel design performs best of the tested designs under the given conditions. In addition, the revolved design can compete with solutions as planar litz when it comes to value meaning cost and production complexity. Furthermore, the article shows the abilities of a heat measurement prototype.reviewe

Challenges and Strategies for a Real-Time Implementation of a Rainflow-Counting Algorithm for Fatigue Assessment of Power Modules

The aim of this work is to obtain a reliable estimation of the remaining lifetime of power-electronic modules. Lifetime models provide information on the fatigue durability of power modules under repetitive loading circumstances. However, the thermo-mechanical stresses that a device is exposed to during operation are different than the ones evaluated to create the lifetime models. Rainflow counting provides a tool to analyze and evaluate the stress content of a randomly varying stress waveform, but counting stress cycles while the device is operating is challenging. In this paper, implementation challenges for an online rainflow-counting method are presented, and solutions to overcome them are discussed. An algorithm for online rainflow counting is implemented, and numerical results from tests on experimental device-temperature data are presented.Challenges and Strategies for a Real-Time Implementation of a Rainflow-Counting Algorithm for Fatigue Assessment of Power ModulesacceptedVersio

Challenges and Strategies for a Real-Time Implementation of a Rainflow-Counting Algorithm for Fatigue Assessment of Power Modules

The aim of this work is to obtain a reliable estimation of the remaining lifetime of power-electronic modules. Lifetime models provide information on the fatigue durability of power modules under repetitive loading circumstances. However, the thermo-mechanical stresses that a device is exposed to during operation are different than the ones evaluated to create the lifetime models. Rainflow counting provides a tool to analyze and evaluate the stress content of a randomly varying stress waveform, but counting stress cycles while the device is operating is challenging. In this paper, implementation challenges for an online rainflow-counting method are presented, and solutions to overcome them are discussed. An algorithm for online rainflow counting is implemented, and numerical results from tests on experimental device-temperature data are presented

Failure analysis and lifetime assessment of IGBT power modules at low temperature stress cycles

Lifetime models of high‐power Insulated Gate Bipolar Transistors modules express the number of cycles to end of life as a function of stress parameters. These models are normally developed based on experimental data from accelerated power‐cycling tests performed at predefined temperature stress conditions as, for example, with temperature swings above 60 °C. However, in real power converters applications, the power modules are usually stressed at temperature cycles not exceeding 40 °C. Thus, extrapolating the parameters of lifetime models developed using data from high‐temperature stress cycles experiments might result in erroneous lifetime estimations. This paper presents experimental results from power cycling tests on high‐power Insulated Gate Bipolar Transistors modules subjected to low temperature stress cycles of 30 and 40 °C. Therefore, devices experience still accelerated aging but with stress conditions much closer to the real application. Post‐mortem failure analysis has been performed on the modules reaching end‐of‐life in order to identify the failure mechanism. Finally, the number of cycles to end‐of‐life obtained experimentally is fit with a state‐of‐the‐art lifetime model to assess its validity at low temperature stress cycles. Challenges and limitations on data fitting to this lifetime model and the impact of various stress parameters on the anticipated failure are also presented

Challenges of SiC MOSFET Power Cycling Methodology

This paper investigates the power cycling methodology for reliability testing of SiC metal-oxide-semiconductor field-effect transistors (MOSFETs). Dedicated test benches were designed and built to study this issue. The results indicate that power cycling of SiC MOSFETs is affected by threshold voltage instability. A proposal for reducing the influence of the latter is also given. This is done by adding an additional gate pulse to the device under test, in order to achieve an average bias of zero during one cycle of the power cycling experiment.Challenges of SiC MOSFET Power Cycling MethodologysubmittedVersio

Challenges and Strategies for a Real-Time Implementation of a Rainflow-Counting Algorithm for Fatigue Assessment of Power Modules

The aim of this work is to obtain a reliable estimation of the remaining lifetime of power-electronic modules. Lifetime models provide information on the fatigue durability of power modules under repetitive loading circumstances. However, the thermo-mechanical stresses that a device is exposed to during operation are different than the ones evaluated to create the lifetime models. Rainflow counting provides a tool to analyze and evaluate the stress content of a randomly varying stress waveform, but counting stress cycles while the device is operating is challenging. In this paper, implementation challenges for an online rainflow-counting method are presented, and solutions to overcome them are discussed. An algorithm for online rainflow counting is implemented, and numerical results from tests on experimental device-temperature data are presented

Limitations and Guidelines for Damage Estimation Based on Lifetime Models for High-Power IGBTs in Realistic Application Conditions

Statistical lifetime models for high-power IGBTs are developed based on results from power-cycling experiments, and relate lifetime expectancy to the well-defined conditions of a laboratory experiment. In most cases, predefined cyclic-stress conditions are repeatedly applied, until the power device under test reaches its end of life. However, in real applications, power modules are exposed to non-repetitive stress patterns that can be very different from the power-cycling conditions. A well established lifetime-estimation method suggests to decompose the stress pattern into individual components, whose damage can be calculated using a lifetime model. These damage contributions are then summed up in order to estimate the consumed or the remaining lifetime of a device. When comparing the estimation results to field measurements though, they often fail to match the real behaviour of a power device. This paper points out the uncertainties that appear in this process of applying a lifetime model on stress patterns deriving from field applications. The main purpose is to present typical sources of errors, and discuss how severely these may impact the lifetime estimation

Operational Security Assessment - Planning and Control

publishedVersio

Driver stage implementation with improved turn-on and turn-off delay for wide band gap devices

acceptedVersio

Challenges of SiC MOSFET Power Cycling Methodology

This paper investigates the power cycling methodology for reliability testing of SiC metal-oxide-semiconductor field-effect transistors (MOSFETs). Dedicated test benches were designed and built to study this issue. The results indicate that power cycling of SiC MOSFETs is affected by threshold voltage instability. A proposal for reducing the influence of the latter is also given. This is done by adding an additional gate pulse to the device under test, in order to achieve an average bias of zero during one cycle of the power cycling experiment.Challenges of SiC MOSFET Power Cycling MethodologysubmittedVersio