3 research outputs found
FPGA Implemetation of Acquisition phase of the GPS Receiver using XSG
In the past it was usual to exert a huge effort in the design, simulation, and the real time implementation of the complicated electronic and communication systems, like GNSS receivers. The complexity of the system algorithms combined with the complexity of the available tools created a system that is difficult to track down for debugging or for redesign. So, the simulation and educational tools was different from the prototyping tools. In this paper the parallel search acquisition phase of a GPS receiver was simulated and implemented on FPGA using the same platform and through a graphical programming language. So this paper introduces the fruit of integrating the prototyping tools with the simulation tools as a single platform through which the complicated electronic systems can be simulated and prototyped
Mitigating the effect of multipath on the stability of time transfer using GNSS
Coordinated Universal Time (UTC) is generated through transferring the time data of hundreds of atomic clocks to the Bureau international des poids et mesures (BIPM). Time transfer using the Global Navigation Satellite Systems (GNSS) is one of the most essential and widely used time transfer techniques. During the path from the transmitter to the receiver, the signals are subject to many phenomena that affect their characteristics. Multipath is one of these phenomena that degrade considerably the time transfer stability. Multipath errors are random errors that cannot be predicted. So, there are no systematic and standard method for compensating the multipath effect.
In this paper the multipath phenomena were studied using a real time transfer data. It was proved that the elevation-azimuth profile of the satellite is affecting considerably multipath errors, and hence, a smart, systematic, and simple method was proposed for mitigating the effect of multipath on the time transfer stability.</p