Feasibility studies of the growth of 3-5 compounds of boron by MOCVD

Boron-arsenic and boron-phosphorus films have been grown on Si sapphire and silicon-on-sapphire (SOS) by pyrolyzing Group 3 alkyls of boron, i.e., trimethylborane (TMB) and triethylborane (TEB), in the presence of AsH3 and PH3, respectively, in an H2 atmosphere. No evidence for reaction between the alkyls and the hydrides on mixing at room temperature was found. However, the films were predominantly amorphous. The film growth rate was found to depend on the concentration of alkyl boron compound and was essentially constant when TEB and AsH3 were pyrolyzed over the temperature range 550 C to 900 C. The films were found to contain mainly carbon impurities (the amount varying with growth temperature), some oxygen, and were highly stressed and bowed on Si substrates, with some crazing evident in thin (2 micron) B-P and thick (5 micron) B-As films. The carbon level was generally higher in films grown using TEB as the boron source. Films grown from PH3 and TMB showed a higher carbon content than those grown from AsH3 and TMB. Based on their B/As and B/P ratios, films with nominal compositions B sub12-16 As2 and B sub1.1-1.3 P were grown using TMB as the boron source

Heteroepitaxy of 3-5 compound semiconductors on insulating substrates Interim report

Heteroepitaxial growth of GaAs films on aluminum oxide substrates by trimethylgallium-arsine proces

Investigation of superlattice device structures

This report describes the investigation of growth properties, and the structure of epitaxial multilayer Si(Si(1x)Ge(x)) films grown on bulk Silicon Substrates. It also describes the fabrication and characterization of MOSFET and MESFET devices made on these epitaxial films. Films were grown in a CVD reactor using hydrides of Si and Ge with H2 and He as carrier gases. Growth temperatures were between 900 C and 1050 C with most films grown at 1000 C. Layer thickness was between 300A and 2000A and total film thickness was between 0.25 micro m and 7 micro m. The Ge content (X) in the alloy layers was between .05 and 0.2. N-type multilayer films grown on (100) p-type Si showed Hall mobility in the range 1000 to 1500 sq cm/v for an average carrier concentration of approx. 10 to the 16th power/cu cm. This is up to 50% higher than the Hall mobility observed in epitaxial Si films grown under the same conditions and with the same average carrier concentration. The mobility enhancement occurred in films with average carrier concentration (n) from 0.7 x 10 to the 16th power to 2 x 10 to the 17th power/cu cm, and total film thickness greater than 1.0 micro m. No mobility enhancement was seen in n-type multilayer films grown on (111) Si or in p-type multilayer films. The structure of the films was investigated was using SEM, TEM, AES, SIMS, and X-ray double crystal diffraction techniques. The film composition profile (AES, SIMS) showed that the transition region between layers is of the order of about 100A. The TEM examination revealed a well defined layered structure with fairly sharp interfaces and good crystalline quality. It also showed that the first few layers of the film (closest to the substrate) are uneven, most probably due to the initial growth pattern of the epitaxial film where growth occurs first in isolated islands that eventually growth and coalesce. The X-ray diffraction measurement determined the elastic strain and strain relief in the alloy layers of the film and the elastic strain in the intervening Si layers

Growth studies on Si0.8Ge0.2 channel two-dimensional hole gases

We report a study of the influences of MBE conditions on the low-temperature mobilities of Si/Si0.8Ge0.2 2DHG structures. A significant dependence of 2DHG mobility on growth temperature is observed with the maximum mobility of 3640 cm2 V−1 s−1 at 5.4 K being achieved at the relatively high-growth temperature of 640 °C. This dependence is associated with a reduction in interface charge density. Studies on lower mobility samples show that Cu contamination can be reduced both by growth interruptions and by modifications to the Ge source; this reduction produces improvements in the low-temperature mobilities. We suggest that interface charge deriving from residual metal contamination is currently limiting the 4-K mobility

Chemical vapor deposition growth

A chemical vapor deposition (CVD) reactor system with a vertical deposition chamber was used for the growth of Si films on glass, glass-ceramic, and polycrystalline ceramic substrates. Silicon vapor was produced by pyrolysis of SiH4 in a H2 or He carrier gas. Preliminary deposition experiments with two of the available glasses were not encouraging. Moderately encouraging results, however, were obtained with fired polycrystalline alumina substrates, which were used for Si deposition at temperatures above 1,000 C. The surfaces of both the substrates and the films were characterized by X-ray diffraction, reflection electron diffraction, scanning electron microscopy optical microscopy, and surface profilometric techniques. Several experiments were conducted to establish baseline performance data for the reactor system, including temperature distributions on the sample pedestal, effects of carrier gas flow rate on temperature and film thickness, and Si film growth rate as a function of temperature

Chemical vapor deposition growth

A laboratory type CVD reactor system with a vertical deposition chamber and sample pedestal heated by an external RF coil has been extensively modified by installation of mass flow controllers, automatic process sequence timers, and special bellows-sealed air-operated valves for overall improved performance. Various film characterization procedures, including classical metallography, SEM analyses, X ray diffraction analyses, surface profilometry, and electrical measurements (resistivity, carrier concentration, mobility, spreading resistance profiles, and minority-carrier lifetime by the C-V-t method) area used to correlate Si sheet properties with CVD parameters and substrate properties. Evaluation procedures and measurements are given. Experimental solar cell structures were made both in epitaxial Si sheet (on sapphire substrates) and in polycrystalline material on alumina substrates, the former to provide an indication of what might be an upper limit on performance of the latter. Preliminary results are given, as obtained in cell structures not specially designed to allow for the unique properties of the sheet material, and fabricated in material known to be far from optimum for photovoltaic performance. Low power conversion efficiencies have been obtained in the epitaxial as well as the polycrystalline Si sheet

Chemical vapor deposition growth

The objective was to investigate and develop chemical vapor deposition (CVD) techniques for the growth of large areas of Si sheet on inexpensive substrate materials, with resulting sheet properties suitable for fabricating solar cells that would meet the technical goals of the Low Cost Silicon Solar Array Project. The program involved six main technical tasks: (1) modification and test of an existing vertical-chamber CVD reactor system; (2) identification and/or development of suitable inexpensive substrate materials; (3) experimental investigation of CVD process parameters using various candidate substrate materials; (4) preparation of Si sheet samples for various special studies, including solar cell fabrication; (5) evaluation of the properties of the Si sheet material produced by the CVD process; and (6) fabrication and evaluation of experimental solar cell structures, using impurity diffusion and other standard and near-standard processing techniques supplemented late in the program by the in situ CVD growth of n(+)/p/p(+) sheet structures subsequently processed into experimental cells

Advanced Silicon-on-Insulator: Crystalline Silicon on Atomic Layer Deposited Beryllium Oxide

Silicon-on-insulator (SOI) technology improves the performance of devices by reducing parasitic capacitance. Devices based on SOI or silicon-on-sapphire technology are primarily used in high-performance radio frequency (RF) and radiation sensitive applications as well as for reducing the short channel effects in microelectronic devices. Despite their advantages, the high substrate cost and overheating problems associated with complexities in substrate fabrication as well as the low thermal conductivity of silicon oxide prevent broad applications of this technology. To overcome these challenges, we describe a new approach of using beryllium oxide (BeO). The use of atomic layer deposition (ALD) for producing this material results in lowering the SOI wafer production cost. Furthermore, the use of BeO exhibiting a high thermal conductivity might minimize the self-heating issues. We show that crystalline Si can be grown on ALD BeO and the resultant devices exhibit potential for use in advanced SOI technology applications

BAs and boride III-V alloys

Boron arsenide, the typically-ignored member of the III-V arsenide series BAs-AlAs-GaAs-InAs is found to resemble silicon electronically: its Gamma conduction band minimum is p-like (Gamma_15), not s-like (Gamma_1c), it has an X_1c-like indirect band gap, and its bond charge is distributed almost equally on the two atoms in the unit cell, exhibiting nearly perfect covalency. The reasons for these are tracked down to the anomalously low atomic p orbital energy in the boron and to the unusually strong s-s repulsion in BAs relative to most other III-V compounds. We find unexpected valence band offsets of BAs with respect to GaAs and AlAs. The valence band maximum (VBM) of BAs is significantly higher than that of AlAs, despite the much smaller bond length of BAs, and the VBM of GaAs is only slightly higher than in BAs. These effects result from the unusually strong mixing of the cation and anion states at the VBM. For the BAs-GaAs alloys, we find (i) a relatively small (~3.5 eV) and composition-independent band gap bowing. This means that while addition of small amounts of nitrogen to GaAs lowers the gap, addition of small amounts of boron to GaAs raises the gap (ii) boron ``semi-localized'' states in the conduction band (similar to those in GaN-GaAs alloys), and (iii) bulk mixing enthalpies which are smaller than in GaN-GaAs alloys. The unique features of boride III-V alloys offer new opportunities in band gap engineering.Comment: 18 pages, 14 figures, 6 tables, 61 references. Accepted for publication in Phys. Rev. B. Scheduled to appear Oct. 15 200