5 research outputs found

    The SST-1M camera for the Cherenkov Telescope Array

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    The prototype camera of the single-mirror Small Size Telescopes (SST-1M) proposed for the Cherenkov Telescope Array (CTA) project has been designed to be very compact and to deliver high performance over thirty years of operation. The camera is composed of an hexagonal photo-detection plane made of custom designed large area hexagonal silicon photomultipliers and a high throughput, highly configurable, fully digital readout and trigger system (DigiCam). The camera will be installed on the telescope structure at the H. Niewodnicza{\'n}ski institute of Nuclear Physics in Krakow in fall 2015. In this contribution, we review the steps that led to the development of the innovative photo-detection plane and readout electronics, and we describe the test and calibration strategy adopted.Comment: In Proceedings of the 34th International Cosmic Ray Conference (ICRC2015), The Hague, The Netherlands. All CTA contributions at arXiv:1508.05894; Full consortium author list at http://cta-observatory.or

    Front-end and slow control electronics for large area SiPMs used for the single mirror Small Size Telescope (SST-1M) of the Cherenkov Telescope Array (CTA)

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    The single mirror Small Size Telescope (SST-1M) project proposes a design among others for the smallest type of telescopes (SST), that will compose the south observatory of the Cherenkov Telescope Array (CTA). The SST camera collecting the Cherenkov light resulting from very high energy gamma-ray interactions in the atmosphere proposes to use Silicon PhotoMultipliers (SiPM). The SST-1M design has led to the use of unique pixel shape and size that required a dedicated development by the University of Geneva and Hamamatsu. An active surface of 3c94 mm2 and a resulting total capacitance of 3c3.4 nF combined with the stringent requirements of the CTA project on timing and charge resolution have led the University of Geneva to develop a custom preamplifier stage and slow-control system. The design and performance of the tailor made preamplifier stage and of the slow control electronics will be briefly described. The bias circuit of the sensor contains a resistor meant to prevent the sensor from drawing high current. However this resistor also introduces a voltage drop at the sensor input impacting the stability of its operation. A model has been developed in order to derive the parameters needed to account for it at the data analysis level. A solution based on the SST-1M front-end and digital readout is proposed to compensate for the voltage drop at the sensor cathode
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