Controlling surface/interface states in GaN-based transistors: Surface model, insulated gate, and surface passivation

Gallium nitride (GaN) is one of the front-runner materials among the so-called wide bandgap semiconductors that can provide devices having high breakdown voltages and are capable of performing efficiently even at high temperatures. The wide bandgap, however, naturally leads to a high density of surface states on bare GaN-based devices or interface states along insulator/semiconductor interfaces distributed over a wide energy range. These electronic states can lead to instabilities and other problems when not appropriately managed. In this Tutorial, we intend to provide a pedagogical presentation of the models of electronic states, their effects on device performance, and the presently accepted approaches to minimize their effects such as surface passivation and insulated gate technologies. We also re-evaluate standard characterization methods and discuss their possible pitfalls and current limitations in probing electronic states located deep within the bandgap. We then introduce our own photo-assisted capacitance-voltage (C-V) technique, which is capable of identifying and examining near mid-gap interface states. Finally, we attempt to propose some directions to which some audience can venture for future development

Influence of passivation-induced stress on the performance of AlGaN/GaN HEMTs

This paper reports on properties of intentionally undoped AlGaN/GaN/sapphire-based high electron mobility transistors (HEMTs) before and after passivation with SiO2 and Si3N4. Our results indicate that the DC performance of the AlGaN/GaN HEMTs improved significantly as the stress in the passivation layer increased from compressive to tensile. It corresponded to changes in the sheet carrier concentration. Unlike the DC properties, RF properties of the HEMTs were less sensitive to the stress

ZrO2/InAlN/GaN Metal-Oxide-Semiconductor Heterostructure Field-Effect Transistors with InAlN Barrier of Different Compositions

We report on InAlN/GaN heterostructure metal-oxide-semiconductor field-effect transistors (MOSHFETs) with an InAlN barrier layer of different compositions (x(InN) 13, 17, and 21%) and ZrO2 gate-insulator/passivation. Static measurements yielded higher drain currents than those on unpassivated HFET counterparts and the currents increased with decreased x(InN). Post deposition annealing of the ZrO2 insulator had less influence on the static performance but remarkable changes were observed on the capacitance-voltage characteristics. The capacitance hysteresis in both channel depletion and barrier accumulation regions was significantly suppressed after annealing. This indicates a reduction of the interfacial trap states and of fixed charge in the oxide. Pulsed current-voltage measurements confirmed this conclusion-the gate lag of only similar to 80% was evaluated for 200 ns pulse width, independently on the composition of the InAlN barrier layer. These results support an application of high permittivity ZrO2 gate-insulator/passivation for the preparation of high-performance InAlN/GaN MOSHFETs. (C) 2013 The Japan Society of Applied Physic

Micro-PL for MOVPE grown AlGaN/GaN HFET structure optimization

Micro-photoluminescence (μ-PL) studies were performed on AlGaN/GaN heterostructure field effect transistor (HFET) structures with different gate recessing depths. It was found that μ-PL is the method of choice for detecting strain in the lateral resolution relevant for HFET device length scales and therefore useful for structure optimization. Strain is partially relaxed and non-uniform after recessing. The PL-results elucidate the device characteristics and partially explain the reduced charge density observed

Micro-PL for MOVPE grown AlGaN/GaN HFET structure optimization

Micro-photoluminescence (μ-PL) studies were performed on AlGaN/GaN heterostructure field effect transistor (HFET) structures with different gate recessing depths. It was found that μ-PL is the method of choice for detecting strain in the lateral resolution relevant for HFET device length scales and therefore useful for structure optimization. Strain is partially relaxed and non-uniform after recessing. The PL-results elucidate the device characteristics and partially explain the reduced charge density observed

Hot-Electron-Related Degradation in InAlN/GaN High-Electron-Mobility Transistors

Hot-electron temperature (T-e) in InAlN/GaN high-electron-mobility transistors (HEMTs) was determined using electroluminescence spectroscopy as a function of gate voltage and correlated with the Te distribution determined by hydrodynamic simulations. Good agreement between measurement and simulations suggests that hot electrons can locally reach temperatures of up to 30 000 K at V-ds = 30 V, i.e., two to three times higher than that typically obtained for similar AlGaN/GaN HEMTs. The consequence of such high Te in InAlN/GaN HEMTs is illustrated by electrical stressing in OFF and semi-ON state at V-gd = 100 V. Prominent channel degradation was observed for devices stressed in semi-ON state, suggesting hot-electron driven degradation. Threshold voltage and drain current transient analyses indicate that hot electrons increase the density of traps in the GaN channel underneath the gate as well as surface/interface traps located in the gate-to-drain access region

Direct electro-optical pumping for hybrid CdSe nanocrystal/III-nitride based nano-light-emitting diodes

We propose a device concept for a hybrid nanocrystal/III-nitride based nano-LED. Our approach is based on the direct electro-optical pumping of nanocrystals (secondary excitation) by electrically driven InGaN/GaN nano-LEDs as the primary excitation source. To this end, a universal hybrid optoelectronic platform was developed for a large range of optically active nano- and mesoscopic structures. The advantage of the approach is that the emission of the nanocrystals can be electrically induced without the need of contacting them. The proof of principal was demonstrated for the electro-optical pumping of CdSe nanocrystals. The nano-LEDs with a diameter of 100 nm exhibit a very low current of 8 nA at 5V bias which is several orders of magnitude smaller than for those conventionally used. The leakage currents in the device layout were typically in the range of 8 pA to 20 pA/cm2 at 5V bias. The photon-photon down conversion efficiency was determined to be 27%. Microphotoluminescence and microelectroluminescence characterization demonstrate the potential for future optoelectronics and highly secure “green” information technology applications