Novel hysteresis effect in ultrathin epitaxial Gd₂O₃ high-k dielectric

Charge trapping in ultrathin high-k Gd₂O₃ dielectric leading to appearance of hysteresis in C–V curves is studied by capacitance-voltage, conductance-frequency and current-voltage techniques at different temperatures. It was shown that the large leakage current at a negative gate voltage causes the reversible trapping of the positive charge in the dielectric layer, without electrical degradation of the dielectric and dielectricsemiconductor interface. The capture cross-sections of the hole traps are around 10⁻¹⁸ and 2 × 10⁻²⁰ cm² . The respective shift of the C–V curve correlates with a “plateau” at the capacitance corresponding to weak accumulation at the silicon interface

Electrical properties of high-k LaLuO3 gate oxide for SOI MOSFETs

The paper presents the results of electrical characterization of MOS capacitors and SOI MOSFETs with novel high-κ LaLuO3 dielectric as a gate oxide. The energy distribution of interface state density at LaLuO3/Si interface is presented and typical maxima of 1.2×1011 eV–1cm–2 was found at about 0.25 eV from the silicon valence band. The output and transfer characteristics of the n- and p-MOSFET (channel length and width were 1 µm and 50 µm, respectively) are presented. The front channel mobility appeared to be 126 cm2V–1s–1 and 70 cm2V–1s–1 for n- and p-MOSFET, respectively. The front channel threshold voltages as well as the density of states at the back interface are presented.</jats:p

Electrical Properties of LaLuO3/Si(100) Structures Prepared by Molecular Beam Deposition

The paper presents the results of electrical characterization in the wide temperature range (120 - 320 K) of the interface and bulk properties of high-k LaLuO3 dielectric deposited by molecular beam deposition (MBD) on silicon substrate. The energy distribution of interface state density is presented and typical maxima of 1.2×1011 and 2.5×1011 eV-1cm-2 were found at about 0.25 - 0.3 eV from the silicon valence band. The charge carrier transport through the dielectric at the forward bias was found to occur via Poole-Frenkel mechanism, while variable range hopping conduction (Mott's law) controls the current at the reverse bias.</jats:p