47 research outputs found
Recent Progress with bioSFQ Circuit Family for Neuromorphic Computing
Superconductor single flux quantum (SFQ) technology is attractive for
neuromorphic computing due to low energy dissipation and high, potentially up
to 100 GHz, clock rates. We have recently suggested a new family of bioSFQ
circuits (V.K. Semenov et al., IEEE TAS, vol. 32, no. 4, 1400105, 2022) where
information is stored as a value of current in a superconducting loop and
transferred as a rate of SFQ pulses propagating between the loops. This
approach in the simplest case dealing with positive numbers, requires
single-line transfer channels. In the more general case of bipolar numbers, it
requires dual-rail transfer channels. For this need, a new comparator with
dual-rail output has been developed and is presented. This comparator is an
essential part of a bipolar multiplier that has also been designed, fabricated,
and tested. We discuss strategic advantages of the suggested bioSFQ approach,
e.g., an inherently asynchronous character of bioSFQ cells which do not require
explicit clock signals. As a result, bioSFQ circuits are free of racing errors
and tolerant to occasional collision of propagating SFQ pulses. This tolerance
is due to stochastic nature of data signals generated by comparators operating
within their gray zone. The circuits were fabricated in the eight-niobium-layer
fabrication process SFQ5ee developed for superconductor electronics at MIT
Lincoln Laboratory.Comment: 5 pages, 7 figures, 12 references. This paper was presented at
Applied Superconductivity Conference, ASC 2022, October 23-28, 2022,
Honolulu, Hawai
Low-Cost Superconducting Fan-Out with Repurposed Josephson Junctions
Superconductor electronics (SCE) promise computer systems with orders of
magnitude higher speeds and lower energy consumption than their complementary
metal-oxide semiconductor (CMOS) counterpart. At the same time, the scalability
and resource utilization of superconducting systems are major concerns. Some of
these concerns come from device-level challenges and the gap between SCE and
CMOS technology nodes, and others come from the way Josephson Junctions (JJs)
are used. Towards this end, we notice that a considerable fraction of hardware
resources are not involved in logic operations, but rather are used for fan-out
and buffering purposes. In this paper, we ask if there is a way to reduce these
overheads; propose the repurposing of JJs at the cell boundaries for fan-out;
and establish a set of rules to discretize critical currents in a way that is
conducive to this reassignment. Finally, we demonstrate the accomplished gains
through detailed analog simulations and modeling analyses. Our experiments
indicate that the introduced method leads to a 48% savings in the JJ count in a
tree with a fan-out of 1024, as well as an average of 43% of the JJ count for
signal splitting and 32% for clock fan-out in ISCAS'85 benchmarks.Comment: 11 pages, 20 figures, submitted to IEEE TA
Progress toward superconductor electronics fabrication process with planarized NbN and NbN/Nb layers
To increase density of superconductor digital and neuromorphic circuits by
10x and reach integration scale of Josephson junctions (JJs) per chip,
we developed a new fabrication process on 200-mm wafers, using self-shunted
Nb/Al-AlOx/Nb JJs and kinetic inductors. The process has a layer of JJs, a
layer of resistors, and 10 fully planarized superconducting layers: 8 Nb layers
and 2 layers of high kinetic inductance materials, MoN and NbN, with sheet
inductance of 8 pH/sq and 3 pH/sq, respectively. NbN films were deposited by
two methods: with =15.5 K by reactive sputtering of a Nb target in
Ar+N mixture; with in the range from 9 K to 13 K by plasma-enhanced
chemical vapor deposition (PECVD) using
Tris(diethylamido)(tert-butylimido)niobium(V) metalorganic precursor. PECVD of
NbN was investigated to obtain conformal deposition and filling narrow trenches
and vias with high depth-to-width ratios, which was not possible to achieve
using sputtering and other physical vapor deposition (PVD) methods at
temperatures below required to prevent degradation of Nb/Al-AlOx/Nb
junctions. Nb layers with 200 nm thickness are used in the process layer stack
as ground planes to maintain a high level of interlayer shielding and low
intralayer mutual coupling, for passive transmission lines with wave impedances
matching impedances of JJs, typically <=50 , and for low-value
inductors. NbN and NbN/Nb bilayer are used for cell inductors. Using NbN/Nb
bilayers and individual pattering of both layers to form inductors allowed us
to minimize parasitic kinetic inductance associated with interlayer vias and
connections to JJs as well as to increase critical currents of the vias.
Fabrication details and results of electrical characterization of NbN films,
wires, and vias, and comparison with Nb properties are given.Comment: 12 pages, 16 figures, 4 tables, 49 references. Submitted to IEEE TAS
on Nov. 10, 202
Extremely Large Area (88 mm X 88 mm) Superconducting Integrated Circuit (ELASIC)
Superconducting integrated circuit (SIC) is a promising "beyond-CMOS" device
technology enables speed-of-light, nearly lossless communications to advance
cryogenic (4 K or lower) computing. However, the lack of large-area
superconducting IC has hindered the development of scalable practical systems.
Herein, we describe a novel approach to interconnect 16 high-resolution deep UV
(DUV EX4, 248 nm lithography) full reticle circuits to fabricate an extremely
large (88mm X 88 mm) area superconducting integrated circuit (ELASIC). The
fabrication process starts by interconnecting four high-resolution DUV EX4 (22
mm X 22 mm) full reticles using a single large-field (44 mm X 44 mm) I-line
(365 nm lithography) reticle, followed by I-line reticle stitching at the
boundaries of 44 mm X 44 mm fields to fabricate the complete ELASIC field (88
mm X 88 mm). The ELASIC demonstrated a 2X-12X reduction in circuit features and
maintained high-stitched line superconducting critical currents. We examined
quantum flux parametron (QFP) circuits to demonstrate the viability of common
active components used for data buffering and transmission. Considering that no
stitching requirement for high-resolution EX4 DUV reticles is employed, the
present fabrication process has the potential to advance the scaling of
superconducting quantum devices
Reconstitution of immune cell in liver and lymph node of adult- and newborn-engrafted humanized mice
Failure of human rhombic lip differentiation underlies medulloblastoma formation
Medulloblastoma (MB) comprises a group of heterogeneous paediatric embryonal neoplasms of the hindbrain with strong links to early development of the hindbrain 1â4. Mutations that activate Sonic hedgehog signalling lead to Sonic hedgehog MB in the upper rhombic lip (RL) granule cell lineage 5â8. By contrast, mutations that activate WNT signalling lead to WNT MB in the lower RL 9,10. However, little is known about the more commonly occurring group 4 (G4) MB, which is thought to arise in the unipolar brush cell lineage 3,4. Here we demonstrate that somatic mutations that cause G4 MB converge on the core binding factor alpha (CBFA) complex and mutually exclusive alterations that affect CBFA2T2, CBFA2T3, PRDM6, UTX and OTX2. CBFA2T2 is expressed early in the progenitor cells of the cerebellar RL subventricular zone in Homo sapiens, and G4 MB transcriptionally resembles these progenitors but are stalled in developmental time. Knockdown of OTX2 in model systems relieves this differentiation blockade, which allows MB cells to spontaneously proceed along normal developmental differentiation trajectories. The specific nature of the split human RL, which is destined to generate most of the neurons in the human brain, and its high level of susceptible EOMES +KI67 + unipolar brush cell progenitor cells probably predisposes our species to the development of G4 MB