The Doherty Power Amplifier

Non

A Two-Way GaN Doherty Amplifier for 5G FR2 With Extended Back-Off Range

This article presents the design and experimental characterization of a two-way gallium nitride on silicon carbide (GaN-SiC) monolithic Doherty power amplifier (DPA) for deep back-off operation in the 5G FR2 band. The amplifier, including two driver stages on-chip, achieves 35-dBm output power, 30% power-added efficiency, and 16-dB gain at saturation at 29 GHz. It favorably compares with the present state of the art, maintaining a power-added efficiency higher than 27%, 28%, and 22% at 6-, 9-, and 12-dB output power back-off, respectively

3-Way Doherty Power Amplifiers: Design Guidelines and MMIC Implementation at 28 GHz

This article presents the design strategy and the implementation of a three-way Doherty power amplifier (DPA3W) to enhance the efficiency at deep power back-off. Theoretical design equations are derived, based on which design charts are drawn to explore the available design space, accounting for practical constraints related to the available technology and selected application. The proposed design strategy is demonstrated by the design, fabrication and experimental characterization of a three-way multistage Doherty amplifier optimized for efficiency peaks at 6 and 12 dB back-off. The amplifier is realized on the WIN Semiconductors 150 nm GaN-SiC high-electron-mobility transistor (HEMT) monolithic process at 28 GHz, targeting 5G applications. The prototype achieves saturated output power in excess of 34 dBm and power added efficiency of the order of 15% from 6 to 12 dB back-off, demonstrating competitive performance and a good agreement between simulations and measurements, thus validating the approach

The Switched Mode Power Amplifiers

Non

A design strategy for AM/PM compensation in GaN Doherty power amplifiers

This paper presents the theoretical analysis of phase distortion (AM/PM) mechanisms in Gallium Nitride (GaN) Doherty power amplifiers (DPAs) and a novel approach to optimize the tradeoff between linearity and efficiency. In particular, it is demonstrated how it is possible to mitigate the AM/PM by designing a suitable mismatch at the input of the active devices, based on the identification of constant AM/PM and gain contour circles. The proposed theory is experimentally confirmed by source- and load-pull measurements and further validated through the design and realization of a 7 GHz 10 W DPA based on GaN monolithic technology

High-gain and high-linearity MMIC GaN Doherty Power Amplifier with 3-GHz bandwidth for Ka-band satellite communications

This letter presents the design of a Doherty power amplifier (DPA) for satellite applications in the Ka -band downlink (17.3–20.3 GHz) implemented on a 100-nm GaN–Si HEMT technology. The design aims to achieve high gain and very high intrinsic linearity over a wide bandwidth of 3 GHz. The experimental characterization on the fabricated chip demonstrates that the DPA can maintain a noise-to-power ratio (NPR) higher than 25 dB and power-added efficiency (PAE) of 30% while providing 36 dBm of output power, when tested with a 100-MHz uniformly distributed signal, achieving state-of-the-art performance among the integrated power amplifiers for satellite communications