13 research outputs found
Polysilicon Nanowire Transistors and Arrays Fabricated With the Multispacer Technique
In this paper, we demonstrate the ability of the multi- spacer patterning technique to yield layers of polycrystalline silicon nanowires with a sublithographic pitch, by exclusively using micrometer resolution and CMOS processing steps. We characterize single spacers operating as poly-Si nanowire field effect transistors . We demonstrate also the possibility to lay a spacer perpendicularly to a set of parallel spacers in a crossbar fashion. The extrapolated cross-point density from the small 4 Ă 1-array is in the range of 10 exp10 cmâ2 . We discuss the applications of this technique to improve the density of previously reported poly-SiNW memories and as a future framework for nanowire crossbars and decoders. Then we analyze the limitations and costs of the proposed technique
Complete Nanowire Crossbar Framework Optimized for the Multi-Spacer Patterning Technique
Nanowire crossbar circuits are an emerging architectural paradigm that promises a higher integration density and an improved fault-tolerance due to its reconfigurability. In this paper, we propose for the first time the utilization of the multi-spacer patterning technique to fabricate nanowire crossbars with a high cross-point density up to 1010 cmâ2. We propose a novel decoder fabrication method that can be included in a process dedicated to the multi-spacer patterning technique. We address the technology problems consisting in the variability and fabrication complexity at the design level by optimizing the encoding scheme. We show an overall reduction of the variability by 18% and a cancelation of the fabrication complexity overhead
Temporal Logarithmic Oscillations in Self-Similar Multilayer Aggregation:Â ShlesingerâHughes Renormalization with Application to the Tunnel-Assisted Wet Oxidation of Silicon
Impact of energy filtering and carrier localization on the thermoelectric properties of granular semiconductors
Energy filtering has been widely considered as a suitable tool to increase the thermoelectric performances of several classes of materials. In its essence, energy filtering provides a way to increase the Seebeck coefficient by introducing a strongly energy-dependent scattering mechanism. Under certain conditions, however, potential barriers may lead to carrier localization, that may also affect the thermoelectric properties of a material. A model is proposed, actually showing that randomly distributed potential barriers (as those found, e.g., in polycrystalline films) may lead to the simultaneous occurrence of energy filtering and carrier localization. Localization is shown to cause a decrease of the actual carrier density that, along with the quantum tunneling of carriers, may result in an unexpected increase of the power factor with the doping level. The model is corroborated toward experimental data gathered by several authors on degenerate polycrystalline silicon and lead tellurid
High figures of merit in degenerate semiconductors. Energy filtering by grain boundaries in heavily doped polycrystalline silicon
Heavily boron-doped polycrystalline silicon has been reported to be characterized by somewhat unexpectedly high power factor. High Seebeck coefficients are however unexpected in materials with high carrier densities. A semi-quantitative model was proposed, showing that the potential barrier structure at grain boundaries, along with the nanometric grain size, leads to an unusual mechanism of carrier filtering, named adiabatic energy filtering. Actually, the presence of potential barriers associated with segregated boron disables charge transport by holes in the band deep tail. This leads to a decrease of the actual carrier density, as in the case of standard energy filtering. However, the nanometric grain size along with the inefficiency of the hole-hole relaxation mechanism in degenerate semiconductors actually prevents carriers from relaxing, causing an increase of the average (macroscopic) drift mobility. Thus, in spite of the decrease of drifting hole density the electrical conductivity is found to increase. In this communication a refinement of the model is presented, that will be discussed and corroborated with an extended body of experimental data gathered by several authors on degenerate polycrystalline silicon films