An FPGA platform for real-time simulation of spiking neuronal networks

In the last years, the idea to dynamically interface biological neurons with artificial ones has become more and more urgent. The reason is essentially due to the design of innovative neuroprostheses where biological cell assemblies of the brain can be substituted by artificial ones. For closed-loop experiments with biological neuronal networks interfaced with in silico modeled networks, several technological challenges need to be faced, from the low-level interfacing between the living tissue and the computational model to the implementation of the latter in a suitable form for real-time processing. Field programmable gate arrays (FPGAs) can improve flexibility when simple neuronal models are required, obtaining good accuracy, real-time performance, and the possibility to create a hybrid system without any custom hardware, just programming the hardware to achieve the required functionality. In this paper, this possibility is explored presenting a modular and efficient FPGA design of an in silico spiking neural network exploiting the Izhikevich model. The proposed system, prototypically implemented on a Xilinx Virtex 6 device, is able to simulate a fully connected network counting up to 1,440 neurons, in real-time, at a sampling rate of 10 kHz, which is reasonable for small to medium scale extra-cellular closed-loop experiments

Non-invasive Coronary Flow Velocity Reserve Assessment Predicts Adverse Outcome In Women With unstable angina Without Obstructive Coronary Artery Stenosis

Background: Evaluation of coronary flow velocity reserve (CFVR) is the physiological approach to assess the severity of coronary stenosis and microvascular dysfunction. Impaired CFVR occurs frequently in women with suspected or known coronary artery disease . The aim of this study was to assess the role of CFVR to predict long-term cardiovascular event rate in women with unstable angina (UA) without obstructive coronary artery stenosis. Methods: CFVR in left anterior descending coronary artery was assessed by adenosine transthoracic echocardiograhy in 161 women admitted at our Department with UA and without obstructive coronary artery disease. Results: During a mean FU of 32.5 ±19.6 months, 53 cardiac events occurred: 6 nonfatal acute myocardial infarction , 22 UA, 7 coronary revascularization by percutaneous transluminal coronary angioplasty, 1 coronary bypass surgery, 3 ischemic stroke and 8 episodes of congestive heart failure with preserved ejection fraction and 6 cardiac deaths. Using a ROC curve analysis, CFVR 2.14 was the best predictor of cardiac events and was considered as abnormal CFVR. Abnormal CFVR was associated with lower cardiac event-free survival (30% vs 80%, p<0.0001). During FU, 70% of women with reduced CFVR had cardiac events whereas only 20% with normal CFVR (p=0.0001). At multivariate Cox analysis, smoke habitus (p=0.003), metabolic syndrome (p=0.01), and CFVR (p<0.0001) were significantly associated with cardiac events at FU. Conclusion: Noninvasive CFVR provides an independent predictor of cardiovascular prognosis information in women with UA without obstructive coronary artery disease whereas, impaired CFVR seems to be associated with higher CV events at FU

Oil Essential Mouthwashes Antibacterial Activity against Aggregatibacter actinomycetemcomitans: A Comparison between Antibiofilm and Antiplanktonic Effects

The aim of this work is to determine the antibacterial activity of three marketed mouthwashes on suspended and sessile states of Aggregatibacter actinomycetemcomitans. The efficacy of two commonly used products in clinical practice, containing essential oils as active ingredients (menthol, thymol, methyl salicylate, and eucalyptol) in association with or without alcohol, has been evaluated in comparison with a chlorhexidine-based mouthwash. The microtiter plate assay, in order to obtain a spectrophotometric measurement of bacterial responses at growing dilutions of each antiseptic, was used for the study. The analysis revealed that a good antibacterial activity is reached when the abovementioned mouthwashes were used at concentration over a 1/24 dilution and after an exposure time of 30 seconds at least. In conclusion, the alcoholic mouthwash appears to have a better biofilm inhibition than its antiplanktonic activity while the nonalcoholic product demonstrates an opposite effect with a better antiplanktonic behavior

Array analysis of seismic noise at the Sos Enattos mine, the Italian candidate site for the Einstein Telescope

The area surrounding the dismissed mine of Sos Enattos (Sardinia, Italy) is the Italian candidate site for hosting Einstein Telescope (ET), the third-generation gravitational wave (GW) observatory. One of the goals of ET is to extend the sensitivity down to frequencies well below those currently achieved by GW detectors, i.e. down to 2 Hz. In the bandwidth [1,10] Hz, the seismic noise of anthropogenic origin is expected to represent the major perturbation to the operation of the infrastructure, and the site that will host the future detector must fulfill stringent requirements on seismic disturbances. In this paper we describe the operation of a temporary, 15-element, seismic array deployed in close proximity to the mine. Signals of anthropogenic origin have a transient nature, and their spectra are characterized by a wide spectral lobe spanning the [3,20] Hz frequency interval. Superimposed to this wide lobe are narrow spectral peaks within the [3,8] Hz frequency range. Results from slowness analyses suggest that the origin of these peaks is related to vehicle traffic along the main road running east of the mine. Exploiting the correlation properties of seismic noise, we derive a dispersion curve for Rayleigh waves, which is then inverted for a shallow velocity structure down to depths of ≈≈ 150 m. This data, which is consistent with that derived from analysis of a quarry blast, provide a first assessment of the elastic properties of the rock materials at the site candidate to hosting ET

Exploring custom heterogeneous MPSoCs for real-time neural signal decoding

The design of embedded systems for neuroprosthetic applications represents an important challenge to be faced in electronic bioengineering. One of the key research problems is decoding the information encoded in neural signals to extract the patient's motion intention. How to implement a highly-portable and reliable integrated solution is still an open issue. In this paper, we investigate the possibility of adopting the MPSoC paradigm in this application domain, presenting a design space exploration that evaluates different custom MPSoC embedded architectures, implementing an on-line neural signal decoding algorithm. The evaluated design points feature different mappings of parallel software tasks onto customized ASIP processing cores. Experimental results, obtained by FPGA-based prototyping, assess the performance and hardware-related costs of the considered configurations. The clock frequency needed to respect real-time constraints was reduced to 22 MHz, making a step further towards the exploitation of custom heterogeneous MPSoCs for ultra-low power biomedical signal processing

MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation

In this paper we target the design of a dedicated low-power computing platform for neuroprosthetic applications. The system must be capable of decoding the information encoded in neural signals, to extract the patients’ motion intention. To this aim, a highly-portable and reliable integrated processing device is required. However, a commonly acknowledged design methodology, to be used in such kind of design cases, is still not available in literature. In this work, we propose and assess the adoption of the MPSoC paradigm as a prospective solution. We present a design-case of a custom MPSoC integrated solution, implementing an on-line neural signal decoding algorithm. The proposed system executes parallel software tasks onto customized ASIP processing cores. Experimental results, obtained by placement- and activity-aware power evaluations carried out using an industrial 40 nm technology node as a reference, assess that the performance and power-related features of the designed architecture are compliant with the implantability constraints and with the battery lifetime required for real-life use. Moreover, besides the effectiveness of the proposed solution, this paper demonstrates also that custom heterogeneous MPSoCs can successfully challenge ultra-low power bio-medical signal processing problem

Quando un sito è ok! : Guida rapida per orientare pazienti e cittadini alla ricerca dell'informazione sanitaria di qualità sul Web

Guide for patients, their relatives and laypeople describing quality health web sites. It was granted by a MIUR (Italian Ministry for University and Research) project for the spreading of the scientific information. The aim of this tool is to provide the “key” for a good web research and to orient and guide towards health quality information. It describes some of the most important health websites in Italian, English, French and Spanish: Azalea, MedlinePlus, Cencer.gov and Cismef. In the appendix you can find a list with links to some other information resources and a directory of Italian patient libraries

On-the-fly adaptivity for process networks over shared-memory platforms

Modern MPSoC architectures incorporate tens of processing elements on a single die. This trend poses the need of expressing the parallelism of the applications in order to effectively exploit the available resources. Several models of computation have been proposed, that specify an application as a network of independent computational elements. Such models represent a suitable solution for systematic mapping of parallel applications onto multiprocessor architectures. However, the workload of a given application can abruptly vary, as well as the amount of computing resources available, depending on the overall workload of the system and on the input data dependency. Traditional worst-case designs may overestimate workloads, leading to resource wasting and unnecessary power consumption. To overcome such limitation, in this work we devise a fast, run-time and automatic approach able to quickly re-configure the core-to-task mapping and the degree of parallelism of the application when the available resources or the application workload change, targeting shared-memory platforms. Experiments, carried out using an FPGA implementation, demonstrate the effectiveness of the proposed approach, in terms of achievable speed-up, power saving and introduced overhead