(1) time Parallel Agorithm for Finding 2D Convex Hull on a Reconfigurable Mesh Computer Architecture

In this paper we propose a parallel algorithm in image processing in (1) time, intended for a parallel machine '' Reconfigurable Mesh Computer (RMC), of size n x n Elementary Processors (PE). The algorithm consists in determining the convex envelope of a two-level 2D image with a complexity in (1) time. The approach used is purely geometric. It is based solely on the projection of the coordinates of PEs retained in specific quadrants and on the application of the algorithm that determines the Min / Max in (1) time. This has reduced the complexity of the algorithm for determining the convex hull at (1) time

Enabling wireless in-band full-duplex

This paper presents a baseband model and an enhanced implementation of the wireless full duplex analog method introduced by [1].Unlike usual methods based on hardware and software self- interference cancelation, the proposed design relies on FSK modulation. The principle is when the transmitter of a local end is sending data by modulating the carrier with the appropriate frequency deviation, its own receiver is checking if the remote transmitter is using the opposite deviation. Instead of architectures often used by both non-coherent and coherent receivers that require one filter (matched filter for coherent detection) for each frequency deviation, our design uses one mixer and one single integrator-decimator filter. We test our design using Universal Software Radio Peripheral as radio frequency front end and computer that implements the signal processing methods under free and open source software. We validate our solution experimentally and we show that in-band full duplex is feasible and synthesizable for wireless communications

Θ(1) Time Algorithm for Master Selection in Ad-hoc Wireless Networks

This paper details a hardware implementation of a distributed Θ(1) time algorithm allows to select dynamically the master device in ad-hoc or cluster-based networks in a constant time regardless the number of devices in the same cluster. The algorithm allows each device to automatically detect its own status; master or slave; based on identifier without adding extra overheads or exchanging packets that slow down the network. We propose a baseband design that implements algorithm functions and we detail the hardware implementation using Matlab/Simulink and Ettus B210 USRP. Tests held in laboratory prove that algorithm works as expected