2D Modeling of Bipolar Junction Transistors

The purpose of this report is to summarize the progress to date on the development of a 2D computer model for bipolar junction transistors. The goals of this project, which ends December 31, 1988, can be broken into two main categories and are listed below: Code Modifications 1. Modify existing 2D solar cell simulation code to handle bipolar junction transistors. 2. Incorporate energy balance equations into the computer model. 3. Incorporate transient and small signal ac analyses. Code Applications 1. Assess performance differences between Delco small and large thin epi devices. 2. Evaluate a polysilicon modification of the thin epi process. 3. Provide general analytic support. 4. Investigate extraction of SPICE parameters from simulation results. 5. Provide version of the code to Delco Electronics. The solar cell code, SCAP2D (Solar Cell Analysis Program in 2 Dimensions), has been successfully modified to handle bipolar junction transistors. This code has been named DAP2D (Device Analysis Program in 2 Dimensions). The major weakness of the code at the present time is its inability to model the Delco thin epi device adequately. The structure of this device is sufficiently complicated that computational restrictions in the present version of DAP2D require that simplifying assumptions be made when modeling this device. This problem is being addressed by the installation of a software package which will reduce the restrictions on device structure complexity (Chapter 3). Some simulation results are presented in Chapter 2. The most significant modeling result to date is the prediction that a factor of about 3 improvement in β can be expected with the addition of a polysilicon emitter contact. This result was obtained by assuming that the polysilicon contact can be modeled by an effective contact recombination velocity. Several appendices are also included in this report. Appendix A contains an overview of the numerical methods used to solve the semiconductor equations which are used to model device behavior. A user’s manual for DAP2D is presented in Appendix B. An example simulation is presented in Appendices C and D

DAP2D: A Two-Dimensional Device Simulation Tool for Silicon Bipolar Transistors

The purpose of this document is to serve as the final report for work performed for Delco Electronics for the period January 1, 1986 through May 15, 1989. A computer program, SCAP2D (Solar Cell Analysis Program in 2- Dimensions) has been successfully converted to enable the simulation of bipolar transistors, including Delco’s thin-epi transistor. This code will be referred to as DAP 2D (Device Analysis Program in 2-Dimensions). Complete source code of DAP 2D is being released to Delco Electronics. This report is organized as follows. Chapter 2 provides a review of the numerical device modeling and discusses code enhancements completed during the last contract year. Chapter 3 shows results obtained by simulating generic bipolar transistors, including polysilicon contacted emitter bipolar transistors. Chapter 4 shows results obtained from simulations of Delco’s thin-epi bipolar transistor. These chapters are intended to show the usefulness of DAP2D in analyzing and designing bipolar transistors. The appendices contain a user’s guide, as well as a complete simulation example

Polysilicon Emitter Fabrication and Modeling

The research proposed for 1986 was to develop the technology for fabricating, measuring, and computer modeling the polysilicon emitter bipolar transistor. Fabrication consisted of producing three types of bipolar transistors; a regular bipolar device to act as the control, a polysilicon contacted emitter transistor, and a polysilicon emitter directly on the base region with a very thin oxide at the interface. The proposed fabrication research concentrated on investigating a new method of fabricating polysilicon contacted emitter bipolar transistors. The new fabrication technique uses plasma etching of the emitter location on the base region and, without breaking vacuum, depositing amorphous silicon (a-Si) on the cleaned interface. The a-Si was then to be doped by ion-implantation and heated to 600-700 C ° to produce the polysilicon emitter contact. The controlled interface and the fine grained polysilicon should lead to more uniform and predictable betas for the polycontacted transistors. Both polysilicon contacted emitters and polysilicon emitters were to be investigated over a range of base doping. We proposed the modeling work in two directions: l) 2-D simulation so that small geometry transistors can be accurately modeled and 2) simulation of polysilicon contacted emitter transistors. Measurements on the devices described above will be used to develop a polysilicon model. The objective of this part of the project is to develop a numerical device simulator with predictive capability, i.e. one that can be used with confidence in place of actual device fabrication. The numerical device models will be provided to Delco and should find many applications in development and manufacturing. The fabrication highlights of the 1986 work were the design and fabrication of preliminary bipolar transistors and polysilicon emitters, the design and layout of the test wafer, and the fabrication and measurements on shallow arsenic doped emitter devices. There were 22 sets of fabrication runs made beyond the preliminary devices. The last results of these runs show that the shallow Arsenic emitter (0.05 /i) and the very narrow base width (0.1 y) control devices with metal emitter contact, have an average peak beta of about 75. Poly contacted emitter devices fabricated at the same time on the same wafer show a beta enhancement to 232, a factor of about 2.7 to 3.0 in the average peak beta. The polysilicon was deposited in a standard way in a LPCVD tube. We are presently fabricating polysilicon devices for studying the effects of the methods used in treating the surfaces before the poly is deposited and the way the poly is formed (amorphous PELPCYD)

Current status of low-temperature radiator thermophotovoltaic devices

The current performance status of low-temperature radiator (< 1,000 C) thermophotovoltaic (TPV) devices is presented. For low-temperature radiators, both power density and efficiency are equally important in designing an effective TPV system. Comparisons of 1 cm x 1 cm, 0.55 eV InGaAs and InGaAsSb voltaic devices are presented. Currently, InGaAs lattice-mismatched devices offer superior performance in comparison to InGaAsSb lattice-matched devices, due to the former`s long-term development for numerous optoelectronic applications. However, lattice-matched antimony-based quaternaries offer numerous potential advantages

Identifying risks for male street gang affiliation: a systematic review and narrative synthesis

Gang violence has increased in recent years. Individuals are becoming gang affiliated younger, and many have suffered historic maltreatment. Subsequent exposure to violence can result in profound consequences, including acute psychological harm. This review aims to identify predictive risk factors for male street gang affiliation. A systematic literature search was conducted utilising PsycINFO, PsycARTICLES, Medline, the Cochrane Central Register of Controlled Trials, the Cochrane Database of Systematic Reviews and the Social Policy and Practice databases (from the databases’ inception to 03/04/15). From this search, n=244 peer-reviewed papers were included in an initial scoping review, and n=102 thereafter met criteria for a systematic review; a narrative synthesis follows. Gang members have typically faced numerous historic adversities across multiple domains; individual, family, peers, school and community. Cumulative factors generated an independent risk. The meta-narrative described an overarching failure to safeguard vulnerable individuals, with the motivation for gang affiliation hypothetically arising from an attempt to have their basic needs met. Clinical and research recommendations were made to inform early intervention policy and practice