Electrical model of an NMOS body biased structure in triple-well technology under photoelectric laser stimulation

International audience— This study is driven by the need to optimize failure analysis methodologies based on laser/silicon interactions with an integrated circuit using a triple-well process. It is therefore mandatory to understand the behavior of elementary devices to laser illumination, in order to model and predict the behavior of more complex circuits. This paper presents measurements of the photoelectric currents induced by a pulsed-laser on an NMOS transistor in triple-well Psubstrate/DeepNwell/Pwell structure dedicated to low power body biasing techniques. This evaluation compares the triple-well structure to a classical Psubstrate-only structure of an NMOS transistor. It reveals the possible activation change of the bipolar transistors. Based on these experimental measurements, an electrical model is proposed that makes it possible to simulate the effects induced by photoelectric laser stimulation

Laser Fault Injection into SRAM cells: Picosecond versus Nanosecond pulses

International audience—Laser fault injection into SRAM cells is a widely used technique to perform fault attacks. In previous works, Roscian and Sarafianos studied the relations between the layout of the cell, its different laser-sensitive areas and their associated fault model using 50 ns duration laser pulses. In this paper, we report similar experiments carried out using shorter laser pulses (30 ps duration instead of 50 ns). Laser-sensitive areas that did not appear at 50 ns were observed. Additionally, these experiments confirmed the validity of the bit-set/bit-reset fault model over the bit-flip one. We also propose an upgrade of the simulation model they used to take into account laser pulses in the picosecond range. Finally, we performed additional laser fault injection experiments on the RAM memory of a microcontroller to validate the previous results

Influence of triple-well technology on laser fault injection and laser sensor efficiency

International audienceThis study is driven by the need to understand the influence of a Deep-Nwell implant on the sensitivity of integrated circuits to laser-induced fault injections. CMOS technologies can be either dual-well or triple-well. Triple-well technology has several advantages compared to dual-well technology in terms of electrical performances. Single-event responses have been widely studied in dual-well whereas SEE (single event effects) in triple-well is not well understood. This paper presents a comparative analysis of soft error rate and countermeasures sensors with for these two techniques in 40 nm and 90 nm CMOS technology. First, laser fault injection on registers were investigated, showing that triple-well technology is more vulnerable. Similarly, we studied the efficiency of Bulk Built-In Current Sensors (BBICS) in detecting laser induced fault injection attempts for both techniques. This sensor was found less effective in triple-well. Finally, a new BBICS compliant with body-biasing adjustments is proposed in order to improve its detection efficiency

High speed voltage follower for standard BiCMOS technology

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Conception de circuits intégrés de régulation intelligente pour les microprocesseurs sécurisés (carte à puce)

Les technologies utilisées pour la conception des cartes à puce migrent rapidement vers les procédés technologiques CMOS submicroniques les plus récents. Alors que pour les lecteurs de ces cartes cette migration est beaucoup plus lente. Pour ces technologies, la réduction constante des épaisseurs d'oxyde de grille contraint à adapter en interne la tension d'alimentation des cartes à puce avec celle fournie par les lecteurs. Cette adaptation doit se traduire par une conversion et une régulation de tension stable quelque soit les variations internes et externes. Dans le cadre de cette thèse, l'analyse des principales topologies de conversion statique a permis la conception de deux convertisseurs dédiés à l'alimentation de cartes à puce à microprocesseur de chez STM. Le premier convertisseur proposé est un convertisseur linéaire classique, utilisant une nouvelle référence de tension programmable. Le second convertisseur est un convertisseur linéaire intégrant un circuit additionnel, agissant par autorégulation sur la tension de grille du transistor de puissance en sortie.Ce circuit additionnel permet en particulier de réaliser une conversion et une régulation de tension de gain unitaire. La phase de conception de ces convertisseurs nécessite une interprétation correcte des résultats de simulation. Dans ce sens, vue de l'alimentation, une macro modélisation de l'activité du microprocesseur est nécessaire. Une macro modélisation basée sur la simulation et la programmation de plusieurs inverseurs logiques est proposée. Les mesures effectuées sur plusieurs prototypes confirment bien l'interprétation théorique proposée ainsi que les résultats attendus à partir des simulations. Différentes solutions permettent de crypter les informations confidentielles qui circulent aux travers des plots d'alimentations des cartes à puces. Les solutions proposées consistent à ajouter des blocs sécuritaires élémentaires pouvant être pilotés par le microprocesseur via des algorithmes de cryptage.LILLE1-BU (590092102) / SudocSudocFranceF

CMOS instrumentation-amplifier based on ASKA cell

International audienc

Multi-harvesting smart solution for self-powered wearable objects

Energy harvesting technology provides a promising alternative to batteries usage in low power systems. The integration of these solutions on the same silicon support is a real technological and technical challenge. This paper proposes a multi-harvesting fully-integrated system architecture combining AC and DC sources. Based on a MATLAB/Simulink model, the proposed system allows the calibration of an optimal solution. It is designed and simulated in 40 nm CMOS process, proving that using an AC source as second input, allows to start a harvesting system with very low DC source as main source

CMOS sinusoidal oscillator based on current-controlled current conveyors

International audienc

CMOS instrumentation-amplifier based on ASKA cell

International audienc

Transconductance CMOS inverter based AC coupling amplifier

International audienc