61 research outputs found

    Analog fault diagnosis : a fault clustering approach

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    A novel analog circuit fault diagnosis method is proposed. This method uses a neural network paradigm to cluster different faults. It is capable of dealing with the common fault models in analog circuits, namely the catastrophic and parametric faults. The proposed technique is independent of the linearity or nonlinearity of the circuit. The process parameter drifts and component tolerance effects of the circuit are well taken care of. Several fault diagnosis strategies for different problem complexities are described. The proposed methodology is illustrated by means of an operational transconductance amplifier (OTA) exampl

    Analog system-level fault diagnosis based on a symbolic method in the frequency domain

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    An analog integrated circuit design laboratory

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    We present the structure of an analog integrated circuit design laboratory to instruct at both, senior undergraduate and entry graduate levels. The teaching material includes: a laboratory manual with analog circuit design theory, pre-laboratory exercises and circuit design specifications; a reference web page with step by step instructions and examples; the use of mathematical tools for automation and analysis; and state of the art CAD design tools in use by industry. Upon completion of the course, the students have skills for an entry level analog designer position

    Filter tuning system using fuzzy logic

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    FGMOS based Current Mirror for Low Voltage Analog Structures

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    A modular T-mode design approach for analog neural network hardware implementations

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    A modular transconductance-mode (T-mode) design approach is presented for analog hardware implementations of neural networks. This design approach is used to build a modular bidirectional associative memory network. The authors show that the size of the whole system can be increased by interconnecting more modular chips. It is also shown that by changing the interconnection strategy different neural network systems can be implemented, such as a Hopfield network, a winner-take-all network, a simplified ART1 network, or a constrained optimization network. Experimentally measured results from CMOS 2-μm double-metal, double-polysilicon prototypes (MOSIS) are presented.Peer Reviewe

    Single Miller capacitor frequency compensation technique for low-power multistage amplifiers

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    <title>Anti-aliasing two-pass image rotation</title>

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    In image rotation, a two-pass algorithm has many advantages over a one-pass algorithm in high speed computation. The reported two-pass algorithm gives a serious performance degradation in high frequency area at large rotation angles (30 degrees to 45 degrees). This paper presents a new two-pass algorithm that overcomes the limitations of previously reported approaches at large rotation angles. The hardware structure for the two-pass algorithm needs only four additional counters. We have also developed a novel three-dimensional Fourier- theoretical basis including the effect of interpolation. A brief comparison of existing techniques and the two-pass algorithm newly suggested is presented. At large rotation angles, the suggested algorithm has almost the same performance as that of the one-pass algorithm and much better performance than that of an existing two-pass algorithm
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