Phenomenological Modeling of Memristive Devices

We present a computationally inexpensive yet accurate phenomenological model of memristive behavior in titanium dioxide devices by fitting experimental data. By design, the model predicts most accurately I-V relation at small non-disturbing electrical stresses, which is often the most critical range of operation for circuit modeling. While the choice of fitting functions is motivated by the switching and conduction mechanisms of particular titanium dioxide devices, the proposed modeling methodology is general enough to be applied to different types of memory devices which feature smooth non-abrupt resistance switching.Comment: 17 pages, 5 figure

Modeling and Experimental Demonstration of a Hopfield Network Analog-to-Digital Converter with Hybrid CMOS/Memristor Circuits

The purpose of this work was to demonstrate the feasibility of building recurrent artificial neural networks with hybrid complementary metal oxide semiconductor (CMOS)/memristor circuits. To do so, we modeled a Hopfield network implementing an analog-to-digital converter (ADC) with up to 8 bits of precision. Major shortcomings affecting the ADC's precision, such as the non-ideal behavior of CMOS circuitry and the specific limitations of memristors, were investigated and an effective solution was proposed, capitalizing on the in-field programmability of memristors. The theoretical work was validated experimentally by demonstrating the successful operation of a 4-bit ADC circuit implemented with discrete Pt/TiO2−x/Pt memristors and CMOS integrated circuit components.National Science Foundation CCF-1028378Air Force Office of Scientific Research FA9550-12-1-0038Ministerio de Economía y Competitividad TEC2012-37868-C04-0

High-Precision Tuning of State for Memristive Devices by Adaptable Variation-Tolerant Algorithm

Using memristive properties common for the titanium dioxide thin film devices, we designed a simple write algorithm to tune device conductance at a specific bias point to 1% relative accuracy (which is roughly equivalent to 7-bit precision) within its dynamic range even in the presence of large variations in switching behavior. The high precision state is nonvolatile and the results are likely to be sustained for nanoscale memristive devices because of the inherent filamentary nature of the resistive switching. The proposed functionality of memristive devices is especially attractive for analog computing with low precision data. As one representative example we demonstrate hybrid circuitry consisting of CMOS summing amplifier and two memristive devices to perform analog multiply and accumulate computation, which is a typical bottleneck operation in information processing.Comment: 20 pages, 6 figure

Advisor

This dissertation describes architectures of digital memories and reconfigurable Boolean logic circuits for the prospective hybrid CMOS/nanowire/ nanodevice (“CMOL”) technology. The basic idea of CMOL circuits is to combine the advantages of CMOS technology (including its flexibility and high fabrication yield) with those of molecular-scale nanodevices. Two-terminal nanodevices would be naturally incorporated into nanowire crossbar fabric, enabling very high function density at acceptable fabrication costs. In order to overcome the CMOS/nanodevice interface problem, in CMOL circuits the interface is provided by sharp-tipped pins that are distributed all over the circuit area, on top of the CMOS stack. The most straightforward possible application of CMOL circuits is terabit-scale “resistive ” memories, in which nanodevices (e.g., single molecules) would be used as single-bit memory cells, while the semiconductor subsystem would perform all the peripheral (input/output, coding / decoding, line driving, and sense amplification) functions. Using bad-bi