51 research outputs found

    Design and layout strategies for integrated frequency synthesizers with high spectral purity

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    Dieser Beitrag ist mit Zustimmung des Rechteinhabers aufgrund einer (DFG geförderten) Allianz- bzw. Nationallizenz frei zugänglich.This publication is with permission of the rights owner freely accessible due to an Alliance licence and a national licence (funded by the DFG, German Research Foundation) respectively.Design guidelines for fractional-N phase-locked loops with a high spectral purity of the output signal are presented. Various causes for phase noise and spurious tones (spurs) in integer-N and fractional-N phase-locked loops (PLLs) are briefly described. These mechanisms include device noise, quantization noise folding, and noise coupling from charge pump (CP) and reference input buffer to the voltage-controlled oscillator (VCO) and vice versa through substrate and bondwires. Remedies are derived to mitigate the problems by using proper PLL parameters and a careful chip layout. They include a large CP current, sufficiently large transistors in the reference input buffer, linearization of the phase detector, a high speed of the programmable frequency divider, and minimization of the cross-coupling between the VCO and the other building blocks. Examples are given based on experimental PLLs in SiGe BiCMOS technologies for space communication and wireless base stations.BMBF, 03ZZ0512A, Zwanzig20 - Verbundvorhaben: fast-spot; TP1: Modularer Basisband- Prozessor mit extrem hohen Datenraten, sehr kurzen Latenzzeiten und SiGe-Analog-Frontend-IC-Fertigung bei >200 GHz Trägerfrequen

    A 216–256 GHz fully differential frequency multiplier-by-8 chain with 0 dBm output power

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    Dieser Beitrag ist mit Zustimmung des Rechteinhabers aufgrund einer (DFG geförderten) Allianz- bzw. Nationallizenz frei zugänglich.This publication is with permission of the rights owner freely accessible due to an Alliance licence and a national licence (funded by the DFG, German Research Foundation) respectively.This work presents a fully differential wideband and low power 240 GHz multiplier-by-8 chain, manufactured in IHP's 130 nm SiGe:C BiCMOS technology with fT/fmax = 300/500 GHz. A single ended 30 GHz input signal is multiplied by 8 using Gilbert cell-based quadrupler and doubler, and then amplified with a wideband differential 3-stage cascode amplifier. To achieve wide bandwidth and optimize for power consumption, the power budget has been designed in order to operate the frequency multipliers and the output amplifier in saturation. With this architecture the presented circuit achieves a 3 dB bandwidth of 40 GHz, meaning a relative 3 dB bandwidth of 17%, and a peak saturated output power of 0 dBm. Harmonic rejections better than 25 dB were measured for the 5th, 6th, and 7th harmonics. It dissipates 255 mW from 3 V supply which results in drain efficiency of 0.4%, while occupying 1.2 mm2. With these characteristics the presented circuit suits very well as a frequency multiplier chain for driving balanced mixers in 240 GHz transceivers for radar, communication, and sensing applications.DFG, 255715243, SPP 1857: Elektromagnetische Sensoren für Life Sciences (ESSENCE

    Integration of 150 Gbps/fiber optical engines based on multicore fibers and 6-channel VCSELs and PDs

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    Multicore fiber enables a parallel optic data link with a single optical fiber, thus providing an attractive way to increase the total throughput and the integration density of the interconnections. We study and present photonics integration technologies and optical coupling approaches for multicore transmitter and receiver subassemblies. Such optical engines are implemented and characterized using multimode 6-core fibers and multicore-optimized active devices: 850-nm VCSEL and PD arrays with circular layout and multi-channel driver and receiver ICs. They are developed for bit-rates of 25 Gbps/channel and beyond, i.e. <150 Gbps per fiber, and also optimized for ruggedized transceivers with extended operation temperature range, for harsh environment applications, including space

    Millimeter-Wave Receiver Concepts for 77 GHz Automotive Radar in Silicon-Germanium Technology

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    The book presents the analysis and design of integrated automotive radar receivers in Silicon-Germanium technology, for use in complex multi-channel radar transceiver front-ends in the 77GHz frequency band. The main emphasis of the work is the realization of high-linearity and low-power modular receiver channels as well as the investigation of millimeter-wave integrated test concepts for the receiver front-end

    Spotlight on MTT-S Administrative Committees [MTT-S Society News]

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