Pancreatic cystosis in cystic fibrosis. Sometimes a bike ride can help you decide

Pancreatic cystosis (PC) is an uncommon manifestation of pancreas involvement in cystic fibrosis (CF), characterized by the presence of multiple macrocysts partially or completely replacing pancreas. Only few reports are available from literature and management (surgery vs follow up) is commonly based on the presence of symptoms or complications due to local mass effect, although evidence-based recommendations are still not available. We here report the case of a young adult CF patient with PC, in which cardiopulmonary exercise testing (CPET) provided important information to be integrated to the radiological finding of inferior vena cava compression by the multicystic pancreas complex. Through the analysis of oxygen kinetic cardiodynamic phase pattern, CPET may be helpful to safely exclude significant mass effects on blood venous return and to improve the decision-making process on whether to consider surgery or not in patients with PC

FLARE: A design environment for FLASH-based space applications

Designing a mass-memory device (i.e., a solid-state recorder) is one of the typical issues of mission-critical space system applications. Flash-memories could be used for this goal: a huge number of parameters and trade-offs need to be explored. Flash-memories are nonvolatile, shock-resistant and power-economic, but in turn have different drawback: e.g., their cost is higher than normal hard disk and the number of erasure cycles is bounded. Moreover space environment presents various issues especially because of radiations: different and quite often contrasting dimensions need to be explored during the design of a flash-memory based solid-state recorder. No systematic approach has so far been proposed to consider them all as a whole: as a consequence a novel design environment currently under development is aimed at supporting the design of flash-based mass-memory device for space application

A programmable BIST architecture for clusters of Multiple-Port SRAMs

This paper presents a BIST architecture, based on a single microprogrammable BIST processor and a set of memory wrappers, designed to simplify the test of a system containing many distributed multi-port SRAMs of different sizes (number of bits, number of words), access protocol (asynchronous, synchronous), and timin

Flash-memories in Space Applications: Trends and Challenges

Nowadays space applications are provided with a processing power absolutely overcoming the one available just a few years ago. Typical mission-critical space system applications include also the issue of solid-state recorder(s). Flash-memories are nonvolatile, shock-resistant and power-economic, but in turn have different drawbacks. A solid-state recorder for space applications should satisfy many different constraints especially because of the issues related to radiations: proper countermeasures are needed, together with EDAC and testing techniques in order to improve the dependability of the whole system. Different and quite often contrasting dimensions need to be explored during the design of a flash-memory based solid- state recorder. In particular, we shall explore the most important flash-memory design dimensions and trade-offs to tackle during the design of flash-based hard disks for space application

Exploring Design Dimensions in Flash-based Mass-memory Devices

Mission-critical space system applications present several issues: a typical one is the design of a mass-memory device (i.e., a solid- state recorder). This goal could be accomplished by using flash- memories: the exploration of a huge number of parameters and trade-offs is needed. On the one hand flash-memories are nonvolatile, shock-resistant and power-economic, but on the other hand their cost is higher than normal hard disk, the number of erasure cycles is bounded and other different drawbacks have to be considered. In addition space environment presents various issues especially because of radiations: the design of a flash- memory based solid-state recorder implies the exploration of different and quite often contrasting dimensions. No systematic approach has so far been proposed to consider them all as a whole: as a consequence the design of flash-based mass-memory device for space applications is intended to be supported by a novel design environment currently under development and refinemen

Design Issues and Challenges of File Systems for Flash Memories

This chapter discusses how to properly address the issues of using NAND flash memories as mass-memory devices from the native file system standpoint. We hope that the ideas and the solutions proposed in this chapter will be a valuable starting point for designers of NAND flash-based mass-memory devices

Single-Event Upset Analysis and Protection in High Speed Circuits

The effect of single-event transients (SETs) (at a combinational node of a design) on the system reliability is becoming a big concern for ICs manufactured using advanced technologies. An SET at a node of combinational part may cause a transient pulse at the input of a flip-flop and consequently is latched in the flip-flop and generates a soft-error. When an SET conjoined with a transition at a node along a critical path of the combinational part of a design, a transient delay fault may occur at the input of a flip-flop. On the other hand, increasing pipeline depth and using low power techniques such as multi-level power supply, and multi-threshold transistor convert almost all paths in a circuit to critical ones. Thus, studying the behavior of the SET in these kinds of circuits needs special attention. This paper studies the dynamic behavior of a circuit with massive critical paths in the presence of an SET. We also propose a novel flip-flop architecture to mitigate the effects of such SETs in combinational circuits. Furthermore, the proposed architecture can tolerant a single event upset (SEU) caused by particle strike on the internal nodes of a flip-flo

Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoC

This paper proposes an analytical method to assess the soft-error rate (SER) in the early stages of a System-on-Chip (SoC) platform-based design methodology. The proposed method gets an executable UML (Unified Modeling Language) model of the SoC and the raw soft- error rate of different parts of the platform as its inputs. Soft-errors on the design are modeled by disturbances on the value of attributes in the classes of the UML model and disturbances on opcodes of software cores. The Dynamic behavior of each core is used to determine the propagation probability of each variable disturbance to the core outputs. Furthermore, the SER and the execution time of each core in the SoC and a Failure Modes and Effects Analysis (FMEA) that determines the severity of each failure mode in the SoC are used to compute the System-Failure Rate (SFR) of the So

Cardiac oxidative stress and inflammatory cytokines response after myocardial infarction

Oxidative stress in heart failure or during ischemia/reperfusion occurs as a result of the excessive generation or accumulation of free radicals or their oxidation products. Free radicals formed during oxidative stress can initiate lipid peroxidation, oxidize proteins to inactive states and cause DNA strand breaks. Oxidative stress is a condition in which oxidant metabolites exert toxic effects because of their increased production or an altered cellular mechanism of protection. In the early phase of acute heart ischemia cytokines have the feature to be functional pleiotropy and redundancy, moreover, several cytokines exert similar and overlapping actions on the same cell type and one cytokine shows a wide range of biological effects on various cell types. Activation of cytokine cascades in the infarcted myocardium was established in numerous studies. In experimental models of myocardial infarction, induction and release of the pro-inflammatory cytokines like TNF-&alpha (Tumor Necrosis Factor &alpha), IL-1&beta (Interleukin- 1&beta) and IL-6 (Interleukin-6) and chemokines are steadily described. The current review examines the role of oxidative stress and pro-inflammatory cytokines response following acute myocardial infarction and explores the inflammatory mechanisms of cardiac injur

Compensating the Noise of a Communication Channel via Asymmetric Encoding of Quantum Information

An asymmetric preparation of the quantum states sent through a noisy channel can enable a new way to monitor and actively compensate the channel noise. The paradigm of such an asymmetric treatment of quantum information is the Bennett 1992 protocol, in which the ratio between conclusive and inconclusive counts is in direct connection with the channel noise. Using this protocol as a guiding example, we show how to correct the phase drift of a communication channel without using reference pulses, interruptions of the quantum transmission or public data exchanges.Comment: 5 pages, 3 figure