1,996 research outputs found

    Online self-repair of FIR filters

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    Chip-level failure detection has been a target of research for some time, but today's very deep-submicron technology is forcing such research to move beyond detection. Repair, especially self-repair, has become very important for containing the susceptibility of today's chips. This article introduces a self-repair-solution for the digital FIR filter, one of the key blocks used in DSPs

    AFSM-based deterministic hardware TPG

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    This paper proposes a new approach for designing a cost-effective, on-chip, hardware pattern generator of deterministic test sequences. Given a pre-computed test pattern (obtained by an ATPG tool) with predetermined fault coverage, a hardware Test Pattern Generator (TPG) based on Autonomous Finite State Machines (AFSM) structure is synthesized to generate it. This new approach exploits "don't care" bits of the deterministic test patterns to lower area overhead of the TPG. Simulations using benchmark circuits show that the hardware components cost is considerably less when compared with alternative solution

    Static analysis of SEU effects on software applications

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    Control flow errors have been widely addressed in literature as a possible threat to the dependability of computer systems, and many clever techniques have been proposed to detect and tolerate them. Nevertheless, it has never been discussed if the overheads introduced by many of these techniques are justified by a reasonable probability of incurring control flow errors. This paper presents a static executable code analysis methodology able to compute, depending on the target microprocessor platform, the upper-bound probability that a given application incurs in a control flow error

    Memory read faults: taxonomy and automatic test generation

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    This paper presents an innovative algorithm for the automatic generation of March tests. The proposed approach is able to generate an optimal March test for an unconstrained set of memory faults in very low computation time. Moreover, we propose a new complete taxonomy for memory read faults, a class of faults never carefully addressed in the past

    A watchdog processor to detect data and control flow errors

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    A watchdog processor for the MOTOROLA M68040 microprocessor is presented. Its main task is to protect from transient faults caused by SEUs the transmission of data between the processor and the system memory, and to ensure a correct instructions' flow, just monitoring the external bus, without modifying the internal architecture of the M68040. A description of the principal procedures is given, together with the method used for monitoring the instructions' flow

    Recupero delle ex Officine Ducrot, oggi Cantieri culturali alla Zisa a Palermo

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    Il costante aumento della popolazione delle grandi cittĂ , ha indotto i comuni a reperire, spesso in maniera piĂč o meno disordinata, nuove aree edificabili destinate, soprattutto, ad edilizia residenziale. Tale attivitĂ  ha soventemente portato ad inglobare, all’interno delle cittĂ , particolari strutture come ad esempio, carceri, mercati ortofrutticoli, mercati ittici, agglomerati industriali, ecc. Nello specifico, le attivitĂ  industriali, in seguito ad oculate pianificazioni, hanno spesso abbandonato gli antichi siti, per trasferirsi in aree industriali moderne e idoneamente attrezzate. La memoria, prendendo in esame le “Officine Ducrot”, realizzate alla fine dei XIX secolo a Palermo, vuole evidenziare come una corretta azione “politica” sul patrimonio di archeologia industriale, puĂČ rifunzionalizzare i siti rendendoli fruibili, consentendone una riappropriazione da parte della societĂ  e, al contempo, fare in modo che possano divenire fonte di sviluppo culturale ed economico del territorio stesso. Per raggiungere questo scopo occorre porsi l’obiettivo di offrire strutture, percorsi e attrezzature che ne consentano la piena godibilitĂ  a tutti, nel rispetto del contest

    Il Patrimonio Culturale tra esigenze e funzionalitĂ  quotidiane

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    La memoria vuole evidenziare come la politica che una nazione adotta sul patrimonio storico, ed in particolare sulle aree urbane, se adeguatamente correlata agli aspetti della Conservazione, della Valorizzazione, della Fruizione etc., puà migliorare, anche in modo significativo, lo sviluppo economico di un territorio che spesso, essendo depositario di specifiche caratteristiche, ù Patrimonio non soltanto del singolo paese ma dell’intera Umanità. Una città accessibile a tutti i fruitori, dal turista, allo studioso, al portatore di handicap, etc., puà divenire fattore trainante di uno sviluppo culturale ed economico del territorio stesso. Per raggiungere questo scopo occorre proporsi l’obiettivo di offrire strutture, percorsi e attrezzature che ne consentano la piena godibilità a tutti, nel rispetto del contesto

    Software dependability techniques validated via fault injection experiments

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    The present paper proposes a C/C++ source-to-source compiler able to increase the dependability properties of a given application. The adopted strategy is based on two main techniques: variable duplication/triplication and control flow checking. The validation of these techniques is based on the emulation of fault appearance by software fault injection. The chosen test case is a client-server application in charge of calculating and drawing a Mandelbrot fracta

    Data criticality estimation in software applications

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    In safety-critical applications it is often possible to exploit software techniques to increase system's fault- tolerance. Common approaches are based on data redundancy to prevent data corruption during the software execution. Duplicating most critical variables only can significantly reduce the memory and performance overheads, while still guaranteeing very good results in terms of fault-tolerance improvement. This paper presents a new methodology to compute the criticality of variables in target software applications. Instead of resorting to time consuming fault injection experiments, the proposed solution is based on the run- time analysis of the variables' behavior logged during the execution of the target application under different workloads

    Validation of a software dependability tool via fault injection experiments

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    Presents the validation of the strategies employed in the RECCO tool to analyze a C/C++ software; the RECCO compiler scans C/C++ source code to extract information about the significance of the variables that populate the program and the code structure itself. Experimental results gathered on an Open Source Router are used to compare and correlate two sets of critical variables, one obtained by fault injection experiments, and the other applying the RECCO tool, respectively. Then the two sets are analyzed, compared, and correlated to prove the effectiveness of RECCO's methodology
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