The predictive power of the Senior Loan Officer Survey: do lending officers know anything special?

The answer to this question is yes, but not that much about banks. Every quarter the Federal Reserve System surveys a panel of senior loan officers at major banks across the nation. The results of this survey have been found in previous studies to provide useful information in predicting gross domestic product. This paper extends that work, finding that sector-specific survey results are relevant for predicting real activity in those sectors but, strangely, that the informative power of the survey results only marginally extend to various measures of performance in the banking sector.

THREE-DIMENSIONAL QUANTITATIVE ANALYSIS OF THE TRAJECTORY OF THE FOOT WHILE RUNNING

Exercising the leg in a manner similar to running is theorized to have the potential effect of increasing performance and reducing occurrence of injuries in running athletes. Development of an exercise device that can help facilitate this method of specificity training could be beneficial to the sports community and should be investigated. Understanding the trajectory of the foot during the running gait is primary to further pursue this concept. 26 running athletes of varying characteristics participated in this study. Each subjects sex, age, weight, height, leg length, activity level and participation amount in their respective sport was recorded. Retro-reflective cameras captured the three-dimensional trajectory of each subjects right leg while running at speeds of 2, 3.8, 4.52 and 5.36 m/s for 10-15 seconds on a treadmill, respectively. The range of foot movement in each cardinal plane was determined for each speed. An ANCOVA revealed that leg length was the most determinate factor in trajectory range differences among subjects. Subjects were subsequently divided into quartiles based on leg length where further analysis revealed that foot displacement increased vertically and horizontally in the sagittal plane with increases in speed while trajectory in the third plane remained constant and substantially less in magnitude

Considering Religion as a Factor in Foster Care in the Aftermath of Employment Division, Department of Human Resources v. Smith and the Religious Freedom Restoration Act

Most rights considered by Americans to be fundamental are granted a special level of protection by the decisions of the United States Supreme Court. The standard is often described as strict scrutiny or compelling interest. Under this standard of protection, a state must have more than just a good reason for writing legislation that encroaches upon its citizens\u27 fundamental rights. Rather, the state must be able to prove a compelling interest in achieving some desired result, a result which necessitates the curtailment of fundamental rights. In 1990, however, the United States Supreme Court substantially restricted a right from this list: the right to freely exercise one\u27s religion. The Court\u27s decision, however, was subsequently severely criticized. In response to the criticism, Congress recently passed the Religious Freedom Restoration Act (RFRA), which returns the application of the compelling interest test to free exercise jurisprudence. This article will explore the impact of the decision in Employment Division Department of Human Resources ,v. Smith upon a discrete group of citizens: foster children. The analysis requires an examination of the problems inherent in protecting a child\u27s right to free exercise in a foster care system, and whether in fact a child does have a protected right to freely exercise his or her religion. The article will consider the rights of the parents, and how parental rights have been impacted by Smith. Finally, the article will consider the possible arguments of states that prefer not to consider religion in making foster care placements. States may argue that the interests of children and parents in the foster care systems must be infringed upon for some greater good

Structure for implementation of back-illuminated CMOS or CCD imagers

A structure for implementation of back-illuminated CMOS or CCD imagers. An epitaxial silicon layer is connected with a passivation layer, acting as a junction anode. The epitaxial silicon layer converts light passing through the passivation layer and collected by the imaging structure to photoelectrons. A semiconductor well is also provided, located opposite the passivation layer with respect to the epitaxial silicon layer, acting as a junction cathode. Prior to detection, light does not pass through a dielectric separating interconnection metal layers

CMOS Imager Has Better Cross-Talk and Full-Well Performance

A complementary metal oxide/semiconductor (CMOS) image detector now undergoing development is designed to exhibit less cross-talk and greater full-well capacity than do prior CMOS image detectors of the same type. Imagers of the type in question are designed to operate from low-voltage power supplies and are fabricated by processes that yield device features having dimensions in the deep submicron range. Because of the use of low supply potentials, maximum internal electric fields and depletion widths are correspondingly limited. In turn, these limitations are responsible for increases in cross-talk and decreases in charge-handling capacities. Moreover, for small pixels, lateral depletion cannot be extended. These adverse effects are even more accentuated in a back-illuminated CMOS imager, in which photogenerated charge carriers must travel across the entire thickness of the device. The figure shows a partial cross section of the structure in the device layer of the present developmental CMOS imager. (In a practical imager, the device layer would sit atop either a heavily doped silicon substrate or a thin silicon oxide layer on a silicon substrate, not shown here.) The imager chip is divided into two areas: area C, which contains readout circuits and other electronic circuits; and area I, which contains the imaging (photodetector and photogenerated-charge-collecting) pixel structures. Areas C and I are electrically isolated from each other by means of a trench filled with silicon oxide. The electrical isolation between areas C and I makes it possible to apply different supply potentials to these areas, thereby enabling optimization of the supply potential and associated design features for each area. More specifically, metal oxide semiconductor field-effect transistors (MOSFETs) that are typically included in CMOS imagers now reside in area C and can remain unchanged from established designs and operated at supply potentials prescribed for those designs, while the dopings and the lower supply potentials in area I can be tailored to optimize imager performance. In area I, the device layer includes an n+ -doped silicon layer on which is grown an n-doped silicon layer. A p-doped silicon layer is grown on top of the n -doped layer. The total imaging device thickness is the sum of the thickness of the n+, n, and p layers. A pixel photodiode is formed between a surface n+ implant, a p implant underneath it, the aforementioned p layer, and the n and n+ layers. Adjacent to the diode is a gate for transferring photogenerated charges out of the photodiode and into a floating diffusion formed by an implanted p+ layer on an implanted n-doped region. Metal contact pads are added to the back-side for providing back-side bias

Pixels, Imagers and Related Fabrication Methods

Pixels, imagers and related fabrication methods are described. The described methods result in cross-talk reduction in imagers and related devices by generating depletion regions. The devices can also be used with electronic circuits for imaging applications

Pixels, Imagers and Related Fabrication Methods

Pixels, imagers and related fabrication methods are described. The described methods result in cross-talk reduction in imagers and related devices by generating depletion regions. The devices can also be used with electronic circuits for imaging applications

Analog bus driver and multiplexer

For a source-follower signal chain, the ohmic drop in the selection switch causes unacceptable voltage offset, non-linearity, and reduced small signal gain. For an op amp signal chain, the required bias current and the output noise rises rapidly with increasing the array format due to a rapid increase in the effective capacitance caused by the Miller effect boosting up the contribution of the bus capacitance. A new switched source-follower signal chain circuit overcomes limitations of existing op-amp based or source follower based circuits used in column multiplexers and data readout. This will improve performance of CMOS imagers, and focal plane read-out integrated circuits for detectors of infrared or ultraviolet light

Single photon detection with self-quenching multiplication

A photoelectronic device and an avalanche self-quenching process for a photoelectronic device are described. The photoelectronic device comprises a nanoscale semiconductor multiplication region and a nanoscale doped semiconductor quenching structure including a depletion region and an undepletion region. The photoelectronic device can act as a single photon detector or a single carrier multiplier. The avalanche self-quenching process allows electrical field reduction in the multiplication region by movement of the multiplication carriers, thus quenching the avalanche