A Simple Control to Reduce the Voltage Stress of Non-Conducting Switches in Three-Level ANPC Converter

With the development of wide band-gap (WBG) technology, the switching speed of power semiconductor devices is increased, which makes circuits more sensitive to parasitics. For three-level active neutral point clamped (3L-ANPC) converters, the over-voltage of non-conducting switches can be an issue. This paper analyzes the multiple commutation loops in 3L-ANPC converter and summarizes the impact factors of the over-voltage for the non-conducting switch. It is found that the nonlinearity of the output capacitance of the device can significantly influence the over-voltage. A simple control without introducing any additional hardware circuit is proposed to attenuate the impact of the nonlinearity. With the proposed control, the peak over-voltage of the non-conducting switch can be reduced significantly. Multi-pulse test is conducted for a 3L- ANPC converter built with silicon carbide (SiC) MOSFETs. The testing results show that the peak over-voltage decreases from 892 V to 624 V with the proposed control. More detailed analysis and experimental results will be provided in the final paper

Design of Low Inductance Busbar for 500 kVA Three-Level ANPC Converter

The adoption of SiC devices in high power applications enables higher switching speed, which requires lower circuit parasitic inductance to reduce the voltage overshoot. This paper presents the design of a busbar for a 500 kVA three-level active natural clamped converter. The layout of the busbar is discussed in detail based on the analysis of the multiple commutation loops, magnetic cancelling effect, and DC-link capacitor placement. The loop inductance of the designed busbar is verified with simulation, impedance measurements and converter experiment. The results can match with each other and the inductances of small and large loop are 6.5 nH and 17.5 nH respectively, which is significantly lower than the busbars of NPC type converters in other references