22 research outputs found

    Field Programmable Gate Array (FPGA) Based Fish Detection Using Haar Classifiers

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    The quantification of abundance, size, and distribution of fish is critical to properly manage and protect marine ecosystems and regulate marine fisheries. Currently, fish surveys are conducted using fish tagging, scientific diving, and/or capture and release methods (i.e., net trawls), methods that are both costly and time consuming. Therefore, providing an automated way to conduct fish surveys could provide a real benefit to marine managers. In order to provide automated fish counts and classification we propose an automated fish species classification system using computer vision. This computer vision system can count and classify fish found in underwater video images using a classification method known as Haar classification. We have partnered with the Birch Aquarium to obtain underwater images of a variety of fish species, and present in this paper the implementation of our vision system and its detection results for our first test species, the Scythe Butterfly fish, subject of the Birch Aquarium logo

    Pre-Pregnancy Body Mass Index Is Associated with Dietary Inflammatory Index and C-Reactive Protein Concentrations during Pregnancy

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    There have been a limited number of studies examining the association between pre-pregnancy body mass index (BMI) and dietary inflammation during pregnancy. Our aim is to examine the association between pre-pregnancy BMI and the Dietary Inflammatory Index (DII)™ and C-reactive protein (CRP) concentrations during pregnancy. The study included 631 pregnant American women from the National Health and Nutrition Examination Survey (NHANES) cross-sectional examinations from 2003 to 2012. Pre-pregnancy BMI was calculated based on self-reported pre-pregnancy weight and measured height. The cut-offs of \u3c18.5 (underweight), 18.5–24.9 (normal), 25.0–29.9 (overweight), and ≥30 kg/m2 (obese) were used to categorize the weight status of pregnant women prior to pregnancy. The DII, a literature-based dietary index to assess the inflammatory properties of diet, was estimated based on a one-day 24-h recall. Multivariable linear and logistic regressions were performed to estimate beta coefficients and the adjusted odds ratios (AORs) and 95% confidence intervals (95% CIs) on the association of pre-pregnancy BMI categories with the DII and CRP concentrations during pregnancy. After controlling for variables including: race/ethnicity, family poverty income ratio, education, marital status, month in pregnancy, and smoking status during pregnancy; women who were obese before pregnancy (n = 136) had increased odds for being in the highest tertile of the DII and CRP concentrations compared to women with normal weight (AORs 2.40, 95% CIs 1.01–5.71; AORs 24.84, 95% CIs 6.19–99.67, respectively). These findings suggest that women with pre-pregnancy obesity had greater odds of reporting higher DII and having elevated CRP. In conclusion, high pre-pregnancy BMI was associated with increased odds of pro-inflammatory diet and elevated CRP levels during pregnancy in the USA

    Doctor of Philosophy

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    dissertationWe live in a big data era, which implies volume, variety, and velocity. One domain that produces and consumes big data is mobile network systems. Another domain dealing with large volumes of data is big data analytics systems known as real-time data stream frameworks. To manage big data in the network systems, the network systems should be performant to meet the real-time characteristics of the traffic. They should be flexible and evolvable to adapt to dynamics of data sources in terms of volumes in different time and distributions as well as to support new services. However, traditional network systems are rigid, which means they are not flexible and evolvable enough to adapt to changing demands or to support new services. In addition, they do not meet the performance requirements since they are designed based on basic communication and process abstractions (e.g., best-effort) without any differentiation between services and applications. In this dissertation, we first identify the limitations of the two network systems, e.g., mobile networks and real-time data processing frameworks, to provide high performance, flexibility, and evolvability. Then, we propose new designs to address the limitations in the network systems. Especially, we show how network programmability combined with multidomain information can realize performant, flexible, and evolvable network systems. The definition of multidomain information in this dissertation is a variety of data, from networks, applications, and users, which is used to inform network programmability to enhance the performance and flexibility in the network system

    Energy Benefits of Reconfigurable Hardware for Use in Underwater Sensor Nets

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    Small, dense underwater sensor networks have the potential to greatly improve undersea environmental and structural monitoring. However, few sensor nets exist because commercially available underwater acoustic modems are too costly and energy inefficient to be practical for this applications. Therefore, when designing an acoustic modem for sensor networks, the designer must optimize for low cost and low energy consumption at every level, from the analog electronics, to the signal processing scheme, to the hardware platform. In this paper we focus on the design choice of hardware platform: digital signal processors, microcontrollers, or reconfigurable hardware, to optimize for energy efficiency while keeping costs low. We implement one algorithm used in an acoustic modem design - matching pursuits for channel estimation - on all three platforms and perform a design space exploration to compare the timing, power and energy consumption of each implementation. We show that the reconfigurable hardware implementation can provide a maximum of 210 X and 52 X decrease in energy consumption over the microcontroller and DSP implementations respectively

    Survey of Hardware Platforms for an Energy Efficient Implementation of Matching Pursuits Algorithm for Shallow Water Networks

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    Coral reefs worldwide are in serious decline. Underwater wireless sensor networks may be the answer to providing the persistent monitoring presence needed to obtain the data necessary to better understand how to protect these ecosystems for the future. Many advances have been made in underwater acoustic communication devices for underwater wireless sensor networks, but a major challenge that still remains is obtaining an energy efficient modem design. To begin to address this challenge, we implement the Matching Pursuits algorithm for channel estimation, an energy consuming portion of an existing underwater acoustic modem designed for shallow water networks, on a variety of hardware platforms. We determine that a dedicated field programmable gate array (FPGA) intellectual property core provides the most energy efficient hardware platform for Matching Pursuits which motivates future work to port the entire modem design to an FPGA for an energy efficient modem design

    Parallelized Architecture of Multiple Classifiers for Face Detection

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    This paper presents a parallelized architecture of multiple classifiers for face detection based on the Viola and Jones object detection method. This method makes use of the AdaBoost algorithm which identifies a sequence of Haar classifiers that indicate the presence of a face. We describe the hardware design techniques including image scaling, integral image generation, pipelined processing of classifiers, and parallel processing of multiple classifiers to accelerate the processing speed of the face detection system. Also we discuss the parallelized architecture which can be scalable for configurable device with variable resources. We implement the proposed architecture in Verilog HDL on a Xilinx Virtex-5 FPGA and show the parallelized architecture of multiple classifiers can have 3.3times performance gain over the architecture of a single classifier and an 84times performance gain over an equivalent software solution

    Increased Performance of FPGA- Based Color Classification System

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    This paper presents a hardware architecture for increased performance of color classification. In our architecture, color classification, based on an AdaBoost algorithm, identifies a pixel as having the color of interest or not. We designed the proposed architecture using Verilog HDL and implemented the design in a Xilinx Virtex-5 FPGA. The architecture for color classification can have 598 times performance improvement over an equivalent software solution and 1.9 times performance improvement over the leading hardware color classifier
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