Characterization of the mechanisms of charge Trapping in GaN Vertical devices

In this master thesis a new type of transistor is analyzed: the GaN Vertical Fin FET Transistor. This kind of transistor is made on GaN, a wide bandgap semiconductor which is a promising material for the future power electronics . Fin FET Transistor is based on a fin-architecture and the current flows vertically through a GaN made nanometer-sized channel having a MOS stack on the sides. In this work different measurements are performed in order to see the variation of the threshold voltage and channel resistance of the transistor varying the fin width and external parameters such as temperature and exposure to UV-light. Oxide trapping phenomena are analysed by applying to the gate an increasing positive bias potential and for increasing periods of time. Simulations are performed in order to further analyze the results and give an extensive explanation of the charge trapping behaviour in different bias conditions.ope

Studio a principi primi delle proprietà di polarizzazione di molecole e piccoli cluster metallici

Utilizzo dle programma "quantum espresso" per lo studio del comportamento del campo elettrico in piccole molecole dielettriche e clusters di alluminio di dimensioni maggiori fino all'annullamento del campo interno. Confronto del momento di dipolo del cluster più grande con quello di una sfera metallica. Introduzione teorica su DFT ed equazioni di Kohn-Sham

Characterization of the mechanisms of charge Trapping in GaN Vertical devices

In this master thesis a new type of transistor is analyzed: the GaN Vertical Fin FET Transistor. This kind of transistor is made on GaN, a wide bandgap semiconductor which is a promising material for the future power electronics . Fin FET Transistor is based on a fin-architecture and the current flows vertically through a GaN made nanometer-sized channel having a MOS stack on the sides. In this work different measurements are performed in order to see the variation of the threshold voltage and channel resistance of the transistor varying the fin width and external parameters such as temperature and exposure to UV-light. Oxide trapping phenomena are analysed by applying to the gate an increasing positive bias potential and for increasing periods of time. Simulations are performed in order to further analyze the results and give an extensive explanation of the charge trapping behaviour in different bias conditions

STUDY OF TRAPPING IN GALLIUM NITRIDE HEMTS FOR RF APPLICATIONS

In recent years new wide band-gap semiconductors are emerging for RF transistors and in many applications, they are substituting the traditional semiconductors. In particular, Gallium Nitride (GaN) and GaN alloys heterostructures are widely studied for High Electron Mobility Transistors (HEMTs). Thanks to the high electron mobility, saturation velocity and breakdown voltage of GaN, Gallium Nitride HEMTs show greater RF performances and the capability to withstand higher voltages. GaN HEMTs are already available on the market, but industries and universities are studying new epitaxial structures and growth techniques in order to optimize these devices and to reach higher frequencies and performances. In this work we have examined HEMTs exploiting both Gallium and Nitrogen polarity. We have studied the trapping mechanisms in highly scaled devices, with gate length below 0.15µm. We have found two de-trapping processes. The first is thermally activated with an activation energy around 0.6eV, it is drain stress voltage dependent and it is ascribed to a semiconductor trap. The second mechanism is a surface de-trapping process. It has slow time constants, it is weakly thermally activated (0.3eV) and it is due to a superimposition of states. We have extrapolated an empirical model that describes the recovery of threshold voltage at different drain stress voltages and temperatures. We have explore in deep the surface trapping. In particular the influence of the surface processes passivation and etching on trapping behavior and reliability during high temperature reverse bias tests (HTRB tests). We have examined the effect on trapping of the epitaxial structure, in particular barrier properties and buffer layers. A chapter of this thesis is dedicated to N-polar HEMTs. This configuration is becoming popular due to the very promising performances. In these devices we have studied the influence of the Aluminum concentration in AlGaN cap layer under the gate Schottky contact. We have found a correlation between gate leakage and trapping. This thesis is an overview of the most recent structures of GaN HEMTs for RF applications and it gives hints on the optimization of GaN HEMTs.In recent years new wide band-gap semiconductors are emerging for RF transistors and in many applications, they are substituting the traditional semiconductors. In particular, Gallium Nitride (GaN) and GaN alloys heterostructures are widely studied for High Electron Mobility Transistors (HEMTs). Thanks to the high electron mobility, saturation velocity and breakdown voltage of GaN, Gallium Nitride HEMTs show greater RF performances and the capability to withstand higher voltages. GaN HEMTs are already available on the market, but industries and universities are studying new epitaxial structures and growth techniques in order to optimize these devices and to reach higher frequencies and performances. In this work we have examined HEMTs exploiting both Gallium and Nitrogen polarity. We have studied the trapping mechanisms in highly scaled devices, with gate length below 0.15µm. We have found two de-trapping processes. The first is thermally activated with an activation energy around 0.6eV, it is drain stress voltage dependent and it is ascribed to a semiconductor trap. The second mechanism is a surface de-trapping process. It has slow time constants, it is weakly thermally activated (0.3eV) and it is due to a superimposition of states. We have extrapolated an empirical model that describes the recovery of threshold voltage at different drain stress voltages and temperatures. We have explore in deep the surface trapping. In particular the influence of the surface processes passivation and etching on trapping behavior and reliability during high temperature reverse bias tests (HTRB tests). We have examined the effect on trapping of the epitaxial structure, in particular barrier properties and buffer layers. A chapter of this thesis is dedicated to N-polar HEMTs. This configuration is becoming popular due to the very promising performances. In these devices we have studied the influence of the Aluminum concentration in AlGaN cap layer under the gate Schottky contact. We have found a correlation between gate leakage and trapping. This thesis is an overview of the most recent structures of GaN HEMTs for RF applications and it gives hints on the optimization of GaN HEMT

Role of carbon in dynamic effects and reliability of 0.15-um AlGaN/GaN HEMTs for RF power amplifiers

This paper presents results concerning the dynamic performance and reliability of Fe-doped and C-doped 0.15-\uf06dm gate AlGaN/GaN HEMTs. Step-stress tests at increasing drain-source voltage and different gate-source voltages are specifically reported. Fe-doped HEMTs exhibit, under both off- and on-state conditions, excellent parametric stability up to breakdown. C-doped devices are instead affected by enhanced degradation effects during the step stress experiments compared to Fe-doped ones, consisting of RON increase during off-state stress and both threshold-voltage and RON increase under on-state conditions. 2D hydrodynamic device simulations are used to validate hypotheses on the physical mechanisms underlying the observed, distinctive degradation effects. The role of C doping in causing additional degradation compared to Fe-doped device is explained with the aid of device simulations as follows: 1) under off-state conditions, hole emission from the CN acceptor traps in the gate-drain region of the buffer leads to an RON increase which is not completely recovered during the typical recovery time interval following each stress phase and therefore accumulates during the step stress experiment; 2) under on-state conditions, channel hot electrons are injected (besides towards the surface) into the buffer where they can be captured by CN traps under the gate and in the gate-drain region, inducing semi-permanent threshold-voltage and RON increases